Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 197
Documentation Changes
TEST—Logical Compare
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
A8 ib TEST AL, imm8 AValid Valid AND imm8 with AL; set SF,
ZF, PF according to result.
A9 iw TEST AX, imm16 AValid Valid AND imm16 with AX; set SF,
ZF, PF according to result.
A9 id TEST EAX, imm32 AValid Valid AND imm32 with EAX; set
SF, ZF, PF according to
result.
REX.W + A9 id TEST RAX, imm32 AValid N.E. AND imm32 sign-extended
to 64-bits with RAX; set SF,
ZF, PF according to result.
F6 /0 ib TEST r/m8, imm8 BValid Valid AND imm8 with r/m8; set
SF, ZF, PF according to
result.
REX + F6 /0 ib TEST r/m8*, imm8 BValid N.E. AND imm8 with r/m8; set
SF, ZF, PF according to
result.
F7 /0 iw TEST r/m16,
imm16
BValid Valid AND imm16 with r/m16; set
SF, ZF, PF according to
result.
F7 /0 id TEST r/m32,
imm32
BValid Valid AND imm32 with r/m32; set
SF, ZF, PF according to
result.
REX.W + F7 /0
id
TEST r/m64,
imm32
BValid N.E. AND imm32 sign-extended
to 64-bits with r/m64; set
SF, ZF, PF according to
result.
84 /r TEST
r/m8, r8 CValid Valid AND r8 with r/m8; set SF,
ZF, PF according to result.
REX + 84 /r TEST r/m8*, r8* CValid N.E. AND r8 with r/m8; set SF,
ZF, PF according to result.
85 /r TEST r/m16, r16 CValid Valid AND r16 with r/m16; set SF,
ZF, PF according to result.
85 /r TEST r/m32, r32 CValid Valid AND r32 with r/m32; set SF,
ZF, PF according to result.
REX.W + 85 /r TEST r/m64, r64 CValid N.E. AND r64 with r/m64; set SF,
ZF, PF according to result.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.