Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 187
Documentation Changes
SLDT—Store Local Descriptor Table Register
Instruction Operand Encoding
...
SMSW—Store Machine Status Word
Instruction Operand Encoding
...
SQRTPD—Compute Square Roots of Packed Double-Precision Floating-
Point Values
Opcode* Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 00 /0 SLDT r/m16 A Valid Valid Stores segment selector
from LDTR in r/m16.
REX.W + 0F 00
/0
SLDT r64/m16 A Valid Valid Stores segment selector
from LDTR in r64/m16.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (w) NA NA NA
Opcode* Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 01 /4 SMSW r/m16 A Valid Valid Store machine status word
to r/m16.
0F 01 /4 SMSW r32/m16 A Valid Valid Store machine status word
in low-order 16 bits of
r32/m16; high-order 16 bits
of r32 are undefined.
REX.W + 0F 01
/4
SMSW r64/m16 A Valid Valid Store machine status word
in low-order 16 bits of
r64/m16; high-order 16 bits
of r32 are undefined.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (w) NA NA NA
Opcode* Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 51 /r SQRTPD xmm1,
xmm2/m128
A Valid Valid Computes square roots of
the packed double-precision
floating-point values in
xmm2/m128 and stores the
results in xmm1.