Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 183
Documentation Changes
Instruction Operand Encoding
...
SFENCE—Store Fence
Instruction Operand Encoding
REX + 0F 99 SETNS r/m8* A Valid N.E. Set byte if not sign (SF=0).
0F 95 SETNZ r/m8 A Valid Valid Set byte if not zero (ZF=0).
REX + 0F 95 SETNZ r/m8* A Valid N.E. Set byte if not zero (ZF=0).
0F 90 SETO r/m8 A Valid Valid Set byte if overflow (OF=1)
REX + 0F 90 SETO r/m8* A Valid N.E. Set byte if overflow (OF=1).
0F 9A SETP r/m8 A Valid Valid Set byte if parity (PF=1).
REX + 0F 9A SETP r/m8* A Valid N.E. Set byte if parity (PF=1).
0F 9A SETPE r/m8 A Valid Valid Set byte if parity even
(PF=1).
REX + 0F 9A SETPE r/m8* A Valid N.E. Set byte if parity even
(PF=1).
0F 9B SETPO r/m8 A Valid Valid Set byte if parity odd
(PF=0).
REX + 0F 9B SETPO r/m8* A Valid N.E. Set byte if parity odd
(PF=0).
0F 98 SETS r/m8 A Valid Valid Set byte if sign (SF=1).
REX + 0F 98 SETS r/m8* A Valid N.E. Set byte if sign (SF=1).
0F 94 SETZ r/m8 A Valid Valid Set byte if zero (ZF=1).
REX + 0F 94 SETZ r/m8* A Valid N.E. Set byte if zero (ZF=1).
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r) NA NA NA
Opcode* Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F AE /7 SFENCE A Valid Valid Serializes store operations.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description