Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 163
Documentation Changes
Instruction Operand Encoding
...
RCPPS—Compute Reciprocals of Packed Single-Precision Floating-Point
Values
Instruction Operand Encoding
...
Opcode** Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
REX.W + D1 /1 ROR r/m64, 1 A Valid N.E. Rotate 64 bits r/m64 right
once. Uses a 6 bit count.
D3 /1 ROR r/m32, CL B Valid Valid Rotate 32 bits r/m32 right
CL times.
REX.W + D3 /1 ROR r/m64, CL B Valid N.E. Rotate 64 bits r/m64 right
CL times. Uses a 6 bit count.
C1 /1 ib ROR r/m32, imm8 CValid Valid Rotate 32 bits r/m32 right
imm8 times.
REX.W + C1 /1
ib
ROR r/m64, imm8 C Valid N.E. Rotate 64 bits r/m64 right
imm8 times. Uses a 6 bit
count.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.
**See IA-32 Architecture Compatibility section below.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (w) 1 NA NA
B ModRM:r/m (w) CL (r) NA NA
C ModRM:r/m (w) imm8 NA NA
Opcode* Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 53 /r RCPPS xmm1,
xmm2/m128
A Valid Valid Computes the approximate
reciprocals of the packed
single-precision floating-
point values in xmm2/m128
and stores the results in
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA