Specifications
Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 162
Documentation Changes
Opcode** Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
C0 /0 ib ROL r/m8, imm8 CValid Valid Rotate 8 bits r/m8 left imm8
times.
REX + C0 /0 ib ROL r/m8*, imm8 C Valid N.E. Rotate 8 bits r/m8 left imm8
times.
D1 /0 ROL r/m16, 1 A Valid Valid Rotate 16 bits r/m16 left
once.
D3 /0 ROL r/m16, CL B Valid Valid Rotate 16 bits r/m16 left CL
times.
C1 /0 ib ROL r/m16, imm8 CValid Valid Rotate 16 bits r/m16 left
imm8 times.
D1 /0 ROL r/m32, 1 A Valid Valid Rotate 32 bits r/m32 left
once.
REX.W + D1 /0 ROL r/m64, 1 A Valid N.E. Rotate 64 bits r/m64 left
once. Uses a 6 bit count.
D3 /0 ROL r/m32, CL B Valid Valid Rotate 32 bits r/m32 left CL
times.
REX.W + D3 /0 ROL r/m64, CL B Valid N.E. Rotate 64 bits r/m64 left CL
times. Uses a 6 bit count.
C1 /0 ib ROL r/m32, imm8 CValid Valid Rotate 32 bits r/m32 left
imm8 times.
C1 /0 ib ROL r/m64, imm8 C Valid N.E. Rotate 64 bits r/m64 left
imm8 times. Uses a 6 bit
count.
D0 /1 ROR r/m8, 1 A Valid Valid Rotate 8 bits r/m8 right
once.
REX + D0 /1 ROR r/m8*, 1 A Valid N.E. Rotate 8 bits
r/m8 right
once.
D2 /1 ROR r/m8, CL B Valid Valid Rotate 8 bits r/m8 right CL
times.
REX + D2 /1 ROR r/m8*, CL B Valid N.E. Rotate 8 bits r/m8 right CL
times.
C0 /1 ib ROR r/m8, imm8 CValid Valid Rotate 8 bits r/m16 right
imm8 times.
REX + C0 /1 ib ROR r/m8*, imm8 C Valid N.E. Rotate 8 bits r/m16 right
imm8 times.
D1 /1 ROR r/m16, 1 A Valid Valid Rotate 16 bits r/m16 right
once.
D3 /1 ROR r/m16, CL B Valid Valid Rotate 16 bits r/m16 right
CL times.
C1 /1 ib ROR r/m16, imm8 CValid Valid Rotate 16 bits r/m16 right
imm8 times.
D1 /1 ROR r/m32, 1 A Valid Valid Rotate 32 bits r/m32 right
once.