Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 16
Documentation Changes
ADDSUBPD—Packed Double-FP Add/Subtract
Instruction Operand Encoding
...
ADDSUBPS—Packed Single-FP Add/Subtract
Instruction Operand Encoding
...
AND—Logical AND
Opcode Instruction Op/
En
64-bit
Mode
Compat/
Leg Mode
Description
66 0F D0 /r ADDSUBPD xmm1,
xmm2/m128
A Valid Valid Add/subtract double-
precision floating-point
values from xmm2/m128 to
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-bit
Mode
Compat/
Leg Mode
Description
F2 0F D0 /r ADDSUBPS xmm1,
xmm2/m128
A Valid Valid Add/subtract single-
precision floating-point
values from xmm2/m128 to
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-bit
Mode
Compat/
Leg Mode
Description
24 ib AND AL, imm8 CValid Valid AL AND imm8.
25 iw AND AX, imm16 CValid Valid AX AND imm16.
25 id AND EAX, imm32 CValid Valid EAX AND imm32.
REX.W + 25 id AND RAX, imm32 C Valid N.E. RAX AND imm32 sign-
extended to 64-bits.
80 /4 ib AND r/m8, imm8 BValid Valid r/m8 AND imm8.
REX + 80 /4 ib AND r/m8
*
, imm8 BValid N.E. r/m64 AND imm8 (sign-
extended).
81 /4 iw AND r/m16,
imm16
BValid Valid r/m16 AND imm16.
81 /4 id AND r/m32,
imm32
BValid Valid r/m32 AND imm32.
REX.W + 81 /4
id
AND r/m64,
imm32
BValid N.E. r/m64 AND imm32 sign
extended to 64-bits.