Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 151
Documentation Changes
Instruction Operand Encoding
...
PSRAW/PSRAD—Shift Packed Data Right Arithmetic
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 73 /6 ib PSLLQ xmm1,
imm8
B Valid Valid Shift quadwords in xmm1
left by imm8 while shifting
in 0s.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
B ModRM:r/m (r, w) imm8 NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F E1 /r PSRAW mm,
mm/m64
A Valid Valid Shift words in mm right by
mm/m64 while shifting in
sign bits.
66 0F E1 /r PSRAW xmm1,
xmm2/m128
A Valid Valid Shift words in xmm1 right
by xmm2/m128 while
shifting in sign bits.
0F 71 /4 ib PSRAW mm, imm8 B Valid Valid Shift words in mm right by
imm8 while shifting in sign
bits
66 0F 71 /4 ib PSRAW xmm1,
imm8
B Valid Valid Shift words in xmm1 right
by imm8 while shifting in
sign bits
0F E2 /r PSRAD mm,
mm/m64
A Valid Valid Shift doublewords in mm
right by mm/m64 while
shifting in sign bits.
66 0F E2 /r PSRAD xmm1,
xmm2/m128
A Valid Valid Shift doubleword in xmm1
right by xmm2 /m128 while
shifting in sign bits.
0F 72 /4 ib PSRAD mm, imm8 B Valid Valid Shift doublewords in mm
right by imm8 while shifting
in sign bits.
66 0F 72 /4 ib PSRAD xmm1,
imm8
B Valid Valid Shift doublewords in xmm1
right by imm8 while shifting
in sign bits.