Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 150
Documentation Changes
PSLLDQ—Shift Double Quadword Left Logical
Instruction Operand Encoding
...
PSLLW/PSLLD/PSLLQ—Shift Packed Data Left Logical
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 73 /7 ib PSLLDQ xmm1,
imm8
AValid Valid Shift xmm1 left by imm8
bytes while shifting in 0s.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r, w) imm8 NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F F1 /r PSLLW mm,
mm/m64
A Valid Valid Shift words in mm left
mm/m64 while shifting in
0s.
66 0F F1 /r PSLLW xmm1,
xmm2/m128
A Valid Valid Shift words in xmm1 left by
xmm2/m128 while shifting
in 0s.
0F 71 /6 ib PSLLW xmm1,
imm8
B Valid Valid Shift words in mm left by
imm8 while shifting in 0s.
66 0F 71 /6 ib PSLLW xmm1,
imm8
B Valid Valid Shift words in xmm1 left by
imm8 while shifting in 0s.
0F F2 /r PSLLD mm,
mm/m64
A Valid Valid Shift doublewords in mm
left by mm/m64 while
shifting in 0s.
66 0F F2 /r PSLLD xmm1,
xmm2/m128
A Valid Valid Shift doublewords in xmm1
left by xmm2/m128 while
shifting in 0s.
0F 72 /6 ib PSLLD mm, imm8 B Valid Valid Shift doublewords in mm
left by imm8
while shifting
in 0s.
66 0F 72 /6 ib PSLLD xmm1,
imm8
B Valid Valid Shift doublewords in xmm1
left by imm8 while shifting
in 0s.
0F F3 /r PSLLQ mm,
mm/m64
AValid Valid Shift quadword in mm left
by mm/m64 while shifting
in 0s.
66 0F F3 /r PSLLQ xmm1,
xmm2/m128
A Valid Valid Shift quadwords in xmm1
left by xmm2/m128 while
shifting in 0s.
0F 73 /6 ib PSLLQ mm, imm8 BValid Valid Shift quadword in mm left
by imm8 while shifting in 0s.