Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 148
Documentation Changes
PSHUFHW—Shuffle Packed High Words
Instruction Operand Encoding
...
PSHUFLW—Shuffle Packed Low Words
Instruction Operand Encoding
...
PSHUFW—Shuffle Packed Words
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F3 0F 70 /r ib PSHUFHW xmm1,
xmm2/ m128,
imm8
A Valid Valid Shuffle the high words in
xmm2/m128 based on the
encoding in imm8 and store
the result in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) imm8 NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F 70 /r ib PSHUFLW xmm1,
xmm2/m128,
imm8
A Valid Valid Shuffle the low words in
xmm2/m128 based on the
encoding in imm8 and store
the result in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) imm8 NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 70 /r ib PSHUFW mm1,
mm2/m64, imm8
A Valid Valid Shuffle the words in
mm2/m64 based on the
encoding in imm8 and store
the result in mm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) imm8 NA