Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 147
Documentation Changes
Instruction Operand Encoding
...
PSHUFB — Packed Shuffle Bytes
Instruction Operand Encoding
...
PSHUFD—Shuffle Packed Doublewords
Instruction Operand Encoding
...
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 38 00 /r PSHUFB mm1,
mm2/m64
A Valid Valid Shuffle bytes in mm1
according to contents of
mm2/m64.
66 0F 38 00 /r PSHUFB xmm1,
xmm2/m128
A Valid Valid Shuffle bytes in xmm1
according to contents of
xmm2/m128.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 70 /r ib PSHUFD xmm1,
xmm2/m128,
imm8
A Valid Valid Shuffle the doublewords in
xmm2/m128 based on the
encoding in imm8 and store
the result in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) imm8 NA