Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 142
Documentation Changes
PMULLW—Multiply Packed Signed Integers and Store Low Result
Instruction Operand Encoding
...
PMULUDQ—Multiply Packed Unsigned Doubleword Integers
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F D5 /r PMULLW mm,
mm/m64
A Valid Valid Multiply the packed signed
word integers in mm1
register and mm2/m64, and
store the low 16 bits of the
results in mm1.
66 0F D5 /r PMULLW xmm1,
xmm2/m128
A Valid Valid Multiply the packed signed
word integers in xmm1 and
xmm2/m128, and store the
low 16 bits of the results in
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F F4 /r PMULUDQ mm1,
mm2/m64
A Valid Valid Multiply unsigned
doubleword integer in mm1
by unsigned doubleword
integer in mm2/m64, and
store the quadword result in
mm1.
66 0F F4 /r PMULUDQ xmm1,
xmm2/m128
A Valid Valid Multiply packed unsigned
doubleword integers in
xmm1 by packed unsigned
doubleword integers in
xmm2/m128, and store the
quadword results in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA