Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 140
Documentation Changes
PMULHRSW — Packed Multiply High with Round and Scale
Instruction Operand Encoding
...
PMULHUW—Multiply Packed Unsigned Integers and Store High Result
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 38 0B /r PMULHRSW mm1,
mm2/m64
A Valid Valid Multiply 16-bit signed
words, scale and round
signed doublewords, pack
high 16 bits to MM1.
66 0F 38 0B /r PMULHRSW
xmm1,
xmm2/m128
A Valid Valid Multiply 16-bit signed
words, scale and round
signed doublewords, pack
high 16 bits to XMM1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F E4 /r PMULHUW mm1,
mm2/m64
A Valid Valid Multiply the packed
unsigned word integers in
mm1 register and
mm2/m64, and store the
high 16 bits of the results in
mm1.
66 0F E4 /r PMULHUW xmm1,
xmm2/m128
A Valid Valid Multiply the packed
unsigned word integers in
xmm1 and xmm2/m128,
and store the high 16 bits of
the results in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA