Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 139
Documentation Changes
PMOVZX — Packed Move with Zero Extend
Instruction Operand Encoding
...
PMULDQ — Multiply Packed Signed Dword Integers
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-bit
Mode
Compat/
Leg Mode
Description
66 0f 38 30 /r PMOVZXBW
xmm1,
xmm2/m64
A Valid Valid Zero extend 8 packed 8-bit
integers in the low 8 bytes
of xmm2/m64 to 8 packed
16-bit integers in xmm1.
66 0f 38 31 /r PMOVZXBD
xmm1,
xmm2/m32
A Valid Valid Zero extend 4 packed 8-bit
integers in the low 4 bytes
of xmm2/m32 to 4 packed
32-bit integers in xmm1.
66 0f 38 32 /r PMOVZXBQ
xmm1,
xmm2/m16
A Valid Valid Zero extend 2 packed 8-bit
integers in the low 2 bytes
of xmm2/m16 to 2 packed
64-bit integers in xmm1.
66 0f 38 33 /r PMOVZXWD
xmm1,
xmm2/m64
A Valid Valid Zero extend 4 packed 16-bit
integers in the low 8 bytes
of xmm2/m64 to 4 packed
32-bit integers in xmm1.
66 0f 38 34 /r PMOVZXWQ
xmm1,
xmm2/m32
A Valid Valid Zero extend 2 packed 16-bit
integers in the low 4 bytes
of xmm2/m32 to 2 packed
64-bit integers in xmm1.
66 0f 38 35 /r PMOVZXDQ
xmm1,
xmm2/m64
A Valid Valid Zero extend 2 packed 32-bit
integers in the low 8 bytes
of xmm2/m64 to 2 packed
64-bit integers in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 38 28 /r PMULDQ xmm1,
xmm2/m128
A Valid Valid Multiply the packed signed
dword integers in xmm1 and
xmm2/m128 and store the
quadword product in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA