Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 115
Documentation Changes
Instruction Operand Encoding
...
IA-32 Architecture Compatibility
After executing an OUTS, OUTSB, OUTSW, or OUTSD instruction, the Pentium processor
ensures that the EWBE# pin has been sampled active before it begins to execute the
next instruction. (Note that the instruction can be prefetched if EWBE# is not active, but
it will not be executed until the EWBE# pin is sampled active.) Only the Pentium
processor family has the EWBE# pin.
...
PABSB/PABSW/PABSD — Packed Absolute Value
Instruction Operand Encoding
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Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA
Opcode Instruction
Op/
En
64-Bit
Mode
Compat/
Leg Mode Description
0F 38 1C /r PABSB mm1,
mm2/m64
A Valid Valid Compute the absolute value
of bytes in mm2/m64 and
store UNSIGNED result in
mm1.
66 0F 38 1C /r PABSB xmm1,
xmm2/m128
A Valid Valid Compute the absolute value
of bytes in xmm2/m128 and
store UNSIGNED result in
xmm1.
0F 38 1D /r PABSW mm1,
mm2/m64
A Valid Valid Compute the absolute value
of 16-bit integers in
mm2/m64 and store
UNSIGNED result in mm1.
66 0F 38 1D /r PABSW xmm1,
xmm2/m128
A Valid Valid Compute the absolute value
of 16-bit integers in
xmm2/m128 and store
UNSIGNED result in xmm1.
0F 38 1E /r PABSD mm1,
mm2/m64
A Valid Valid Compute the absolute value
of 32-bit integers in
mm2/m64 and store
UNSIGNED result in mm1.
66 0F 38 1E /r PABSD xmm1,
xmm2/m128
A Valid Valid Compute the absolute value
of 32-bit integers in
xmm2/m128 and store
UNSIGNED result in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA