Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 111
Documentation Changes
Instruction Operand Encoding
...
NOP—No Operation
Instruction Operand Encoding
...
NOT—One's Complement Negation
Instruction Operand Encoding
...
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r, w) NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
90 NOP A Valid Valid One byte no-operation
instruction.
0F 1F /0 NOP r/m16 B Valid Valid Multi-byte no-operation
instruction.
0F 1F /0 NOP r/m32 B Valid Valid Multi-byte no-operation
instruction.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA
B ModRM:r/m (r) NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F6 /2 NOT r/m8 AValid Valid Reverse each bit of r/m8.
REX + F6 /2 NOT r/m8* AValid N.E. Reverse each bit of r/m8.
F7 /2 NOT r/m16 AValid Valid Reverse each bit of r/m16.
F7 /2 NOT r/m32 AValid Valid Reverse each bit of r/m32.
REX.W + F7 /2 NOT r/m64 AValid N.E. Reverse each bit of r/m64.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r, w) NA NA NA