Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 109
Documentation Changes
MULPS—Multiply Packed Single-Precision Floating-Point Values
Instruction Operand Encoding
...
MULSD—Multiply Scalar Double-Precision Floating-Point Values
Instruction Operand Encoding
...
MULSS—Multiply Scalar Single-Precision Floating-Point Values
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 59 /r MULPS xmm1,
xmm2/m128
A Valid Valid Multiply packed single-
precision floating-point
values in xmm2/mem by
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F 59 /r MULSD xmm1,
xmm2/m64
A Valid Valid Multiply the low double-
precision floating-point
value in xmm2/mem64 by
low double-precision
floating-point value in
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F3 0F 59 /r MULSS xmm1,
xmm2/m32
A Valid Valid Multiply the low single-
precision floating-point
value in xmm2/mem by the
low single-precision
floating-point value in
xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA