Intel® IQ31244 Customer Reference Board User’s Manual April 2004 Order Number: 252933-001
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Contents Contents 1.0 Introduction ............................................................................................................................... 7 1.1 1.2 1.3 1.4 1.5 1.6 Features................................................................................................................................ 9 Electrical Specifications ...................................................................................................... 10 1.2.1 SATA Drive Enclosures ......................
Contents Figures 1 2 3 4 5 Intel® IQ31244 Customer Reference Board Block Diagram......................................................... 8 Component Layout Diagram (not to scale) ................................................................................. 12 Intel® 80321 I/O Processor Block Diagram ................................................................................ 17 Intel® 80321 I/O Processor Interrupt Connections .....................................................................
Contents Revision History User’s Manual Date Revision April 2004 001 Description Initial release 5
Contents THIS PAGE INTENTIONALLY LEFT BLANK 6 User’s Manual
Intel® IQ31244 Customer Reference Board 1.0 Introduction The Intel® IQ31244 Customer Reference Board (hereafter called “IQ31244”) is a FlexATX motherboard based on the Intel® 80321 I/O Processor. The Intel® third-party part number for this motherboard is MB-701. This platform is capable of operating at a maximum of 100 MHz PCI-X on both the secondary and primary PCI buses (refer to Figure 1).
Intel® IQ31244 Customer Reference Board Figure 1. Intel® IQ31244 Customer Reference Board Block Diagram #( !" # $ ) !" 01 % & ' % & ' 2 2 . ,,+ ,,+ 6 4 / 7, 668 #(33 41 5 .
Intel® IQ31244 Customer Reference Board 1.1 Features The features of the IQ31244 are described in Table 1. Table 1.
Intel® IQ31244 Customer Reference Board 1.2 Electrical Specifications The electrical specifications of the IQ31244 are given in Table 2. Intel® IQ31244 Customer Reference Board Power Requirements Table 2. Voltage Current (Typical) Current (Maximum) +3.3 V 3.19 Amps 4.56 Amps +5 V 1.6 mAmps 2.28 mAmps +12 V 0.0 Amps 0.0 Amps -12 V 0.0 Amps 0.0 Amps Most ATX power-supply units (PSUs) regulate off the 5 V signal. When no devices are drawing from the 5 V supply, the ATX PSU does not supply 3.
Intel® IQ31244 Customer Reference Board 1.4 Physical Characteristics Table 4 provides the physical characteristics of the IQ31244. Table 4. Physical Characteristics Characteristic Dimensions (width × height) 9.0" × 7.5" (228.6 mm × 190.5 mm) Form factor FlexATX Expansion card slot Power supply connector User’s Manual Description PCI expansion slot NOTE: Use only PCI-X expansion cards.
Intel® IQ31244 Customer Reference Board 1.5 Physical Configuration Figure 2 (not to scale) shows the location of jumpers, connectors, and ICs on the IQ31244 motherboard. Refer to this figure when component locations are referenced later in the manual. Figure 2. Component Layout Diagram (not to scale) J1 SERIAL PORT 1 + J8 J24 J23 J25 J27 J30 + + S1 R607 TP18 3V TP19 2.
Intel® IQ31244 Customer Reference Board 1.6 Reference Information Table 5 provides a list of reference information for the components used in this platform. Table 5.
Intel® IQ31244 Customer Reference Board 2.0 PCI-X Interface The IQ31244 contains two 64-bit PCI-X buses. The primary PCI bus, clocked at up to 100 MHz, interfaces with the Intel® 80321 I/O Processor, the Intel® 82546 Dual-Port Gigabit Ethernet Controller, the Intel® 31154 133 MHz PCI Bridge, and the PCI-X expansion slot. Note: The PCI-X expansion slot must be used for PCI-X cards only.
Intel® IQ31244 Customer Reference Board 2.1 PAL Arbitration Circuit The IQ31244 provides a Programmable Analog Logic (PAL) arbitration circuit on the primary PCI-X bus. A rotating priority arbitration scheme with a host and three agents is used. The priority rotates as shown in Table 7. The arbiter evaluates all requests and grants the bus to the highestpriority requesting device. On reset, the host is granted the bus, and agent 0 (PCI-X bridge) has the next-highest priority. Table 7.
Intel® IQ31244 Customer Reference Board 3.0 Intel® 80321 I/O Processor The Intel® 80321 I/O Processor is based on the Intel XScale® micro-architecture core (compliant with ARM* architecture). The on-board 80321 processor supports 64-bit applications with operating frequency of up to 100 MHz. The processor operates in conventional PCI mode or in PCI-X mode as defined by the PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a.
Intel® IQ31244 Customer Reference Board Figure 3.
Intel® IQ31244 Customer Reference Board 3.1 Interrupts The Intel® 80321 I/O Processor is built around an Intel XScale® core, which has four external interrupt lines designated XINT0# through XINT3#. In the 80321 processor, these interrupt lines are not directly connected to external interrupts, but pass through a layer of external interrupt routing logic. Figure 4 shows the interrupt connections on the processor. Figure 4.
Intel® IQ31244 Customer Reference Board 3.2 General-Purpose I/O Unit The Intel® 80321 I/O Processor has eight general-purpose I/O GPIO[7:0] pins to control or monitor external devices in the I/O subsystem: • The GPIO[0] and GPIO[1] signals are for CompactFlash* status. • The GPIO[2] signal can be set to sound the buzzer. The buzzer can be disabled by adding a jumper onto Z14. • The Flash ROM signal VPEN is assigned to GPIO[4] to allow software connection for code/data protection.
Intel® IQ31244 Customer Reference Board 3.4 SDRAM EEPROM The EEPROM located on the SDRAM module contains identification and configuration information. Start-up code must read this information on power-up and must properly configure the Intel XScale® processor to the SDRAM type. 3.5 Temperature Sensors The National Semiconductor* LM75 temperature sensors have over-temperature trip points that trigger an interrupt when crossed. The sensors are placed on the board at U8 and U35.
Intel® IQ31244 Customer Reference Board 3.7 DDR SDRAM The Intel® 80321 I/O Processor integrates a memory controller unit (MCU) to provide a direct interface between the processor and its local memory subsystem.The IQ31244 board is equipped with a 184-pin DIMM socket to accept a +2.5 V Double Data Rate (DDR) synchronous DRAM module with or without error correction code (ECC). This DDR SDRAM interface provides a direct connection to a reliable high-bandwidth memory subsystem.
Intel® IQ31244 Customer Reference Board 4.0 Gigabit Ethernet Interface The IQ31244 includes an Intel® 82546EB Dual-Port Gigabit Ethernet Controller on the primary PCI-X bus. Each port connector, J2 and J3, has a LINK indicator LED on the left side and a ACTIVITY indicator LED on the right side. Table 12. 4.
Intel® IQ31244 Customer Reference Board 5.0 SATA Interface On the IQ31244, the Intel® 31154 133 MHz PCI Bridge interfaces with four Intel® 31244 PCI-X to Serial ATA Controllers on the 64-bit data secondary PCI-X bus clocking at 100 MHz. The 31244 chip transmits and receives commands to one of the four Serial ATA channel with speeds of 1.5 Gb/s and 8b/10b encoded data. Each 31244 controller (U27–U30) has four channels. There is a total of sixteen SATA signal connectors (J21–J36) on the IQ31244 board.
Intel® IQ31244 Customer Reference Board 5.1 SATA JTAG Interface The Intel® 31244 PCI-X to Serial ATA Controller JTAG interface is provided to assist on-board testing on one of the four 31244 devices. Table 15 shows the pin assignment of the 10-pin header for the JTAG (J38) on PCI-X to Serial ATA controller (U30). Table 15. 5.
Intel® IQ31244 Customer Reference Board 5.3 Activity LEDs The IQ31244 provides a group of four sets of headers for each SATA controller located on the bottom-left corner of the board. Each set of headers represents a cathode and anode of an LED for each port of the SATA controller. The SATA activity can be shown through a LED when it is connected to the headers. The activity of the SATA controller can displayed in two modes. In DPA mode, each port has its own LED signal.
Intel® IQ31244 Customer Reference Board 6.0 Peripheral Bus Interface Unit The Peripheral Bus Interface (PBI) unit is a data-communication path to various components of the Intel® I/O processor hardware system that do not have PCI bus interfaces and do not optimally reside on the PCI bus. Since the peripheral bus has low bandwidth, the PBI incorporates a 1 KByte data queue to satisfy the 128 byte ADB requirement of the Intel® bus. The bus is selected to operate at 33 MHz.
Intel® IQ31244 Customer Reference Board 6.3 Console Serial Port A single console serial port with a DB-9 line interface is included on the IQ31244. This port can be connected to a host system through the DB-9 connector from the rear I/O. Table 18.
Intel® IQ31244 Customer Reference Board 6.5 JTAG Emulator Support The IQ31244 provides a JTAG debugger interface at J5. This interface is compatible with the Wind River* visionPROBE*. The JTAG emulator interface connects primarily through the JTAG port of the Intel® 80321 I/O Processor and can assert a reset to the 80321. The JTAG emulator header definition (20-pin standard ARM* connector) is shown in Table 20. Table 20. 6.
Intel® IQ31244 Customer Reference Board 7.0 ATX Power Connector Table 21 shows the connector pinout for the main ATX power connector (J7). This header is implemented with a Molex* 39-29-9202 or equivalent. This power connector mates with a power supply connector, Molex 39-01-2200 or equivalent. Table 21. User’s Manual ATX Power Connector (J1) Pin Signal 1 +3.3V 2 +3.3V 3 GND 4 +5V 5 GND 6 +5V 7 GND 8 PW-OK 9 5VSB 10 +12V 11 +3.
Intel® IQ31244 Customer Reference Board 8.0 Jumpers Table 22. Jumper Options Designator Type J4 2-pin post J11, J12, J13, J14 3-pin post Configure Add shunt to enable Description Enables spread-spectrum clocking on the primary PCI clocks.
