User Manual

Intel® Xeon® Processor E5-2600 v4 Product Family 33
Specification Update December 2016
Implication: When this erratum occurs, performance may be reduced, concurrent with an incorrect
assertion of the PROCHOT# signal.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF78 Writing The IIO_LLC_WAYS MSR Results in an Incorrect Value
Problem: Writing the IIO_LLC_WAYS MSR (C8Bh) always sets bits [1:0] regardless of the value
written.
Implication: IIO cache way allocation may not act as intended. Intel has not seen any functional
failure due to this erratum.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF79 Turbo May Be Delayed After Exiting C6 When Using HWP
Problem: Due to this erratum, enabling HWP (Hardware-Controlled Performance States) by
setting bit 0 of IA32_PM_ENABLE (MSR 770H) may lead to an unexpected delay in
reaching turbo frequencies after a core exits C6 sleep state. This erratum does not
occur when HWP is not enabled.
Implication: When this erratum occurs, enabling HWP may lead to a visible reduction of system
performance.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF80 IA32_MC4_STATUS.VAL May be Incorrectly Cleared by Warm Reset
Problem: Due to this erratum, the IA32_MC4_STATUS. VAL (MSR 411H, bit 63) may be
incorrectly cleared by a warm reset.
Implication: Software may be unaware that a machine check occurred before the warm reset.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF81 Interrupt Remapping May Lead to a System Hang
Problem: Under complex micro-architectural conditions, back-to-back interrupt requests when
interrupt remapping is enabled may lead to a system hang.
Implication: When this erratum occurs, the system hang may be associated with a queued
invalidation of the IOAPIC that does not complete.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: None Identified.
BDF82 MEM_HOT_C23_N DIMM Temperature Reporting Does Not Function
Correctly
Problem: On single HA (Home Agent) systems, the MEM_HOT_C23_N signal can be configured as
an output signal that is asserted when a DIMM temperature exceeds the throttle
threshold (c.f. dimm_temp_th CSRs at Bus: 1; Device: 20; Function: 0,1; Offset:
120H, 124H). Due to this erratum, MEM_HOT_C23_N is not asserted when it should be.
Implication: Platforms that rely on the MEM_HOT_C23_N for DIMM temperature-based throttling
will not behave as expected, potentially leading to unpredictable system behavior,
excessive DIMM aging, and DIMM failure. This erratum does not affect
MEM_HOT_C23_N when configured as an input.
Workaround: Single HA platforms should use Open Loop Thermal Throttling for DIMM temperature
control, use MEM_HOT_C01_N as a proxy for MEM_HOT_C23_N, or have the BMC (or
other external agent) periodically read the DIMM temperature via PECI then use the