User Manual

32 Intel® Xeon® Processor E5-2600 v4 Product Family
Specification Update December 2016
BDF73 Internal Parity Errors May Incorrectly Report Overflow in the
IA32_MC0_STATUS MSR
Problem: Due to this erratum, an uncorrectable internal parity error with an
IA32_MC0_STATUS.MCACOD (bits [15:0]) value of 0005H may incorrectly set the
IA32_MC0_STATUS.OVER flag (bit 62) indicating an overflow when a single error has
been observed.
Implication: IA32_MC0_STATUS.OVER may not accurately indicate multiple occurrences of errors.
There is no other impact to normal processor functionality.
Workaround: None identified
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF74 Incorrect VMCS Used for PML-Index field on VMX Transitions Into and
Out of SMM
Problem: The PML (Page Modification Log) index field is saved to an incorrect VMCS on an SMM
VM exit. VM entries that return from SMM restore the PML-index field from that same
incorrect VMCS.
Implication: The PML-index field is correctly maintained for expected use cases, in which the STM
(SMM-transfer monitor) does not access the PML-index field in the SMM VMCS. If the
STM uses VMREAD to read the field, it will get an incorrect value. In addition, the
processor will ignore any modification of the field that the STM makes using
VMWRITE. Intel has not observed this erratum to impact any commercially available
software.
Workaround: None identified. To access the PML-index field, STM software should first load the
current-VMCS pointer with a pointer to the executive VMCS.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF75 Certain Microcode Updates May Result in Incorrect Throttling Causing
Reduced System Performance
Problem: Microcode updates with signature less than 0B000017 loaded by the operating system
may result in excessive and persistent throttling that significantly reduces system
performance.
Implication: When this erratum occurs, reduced performance may occur, concurrent with an
incorrect assertion of the PROCHOT# signal.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF76 An Intel® Hyper-Threading Technology Enabled Processor May Exhibit
Internal Parity Errors or Unpredictable System Behavior
Problem: Under a complex series of microarchitectural events while running Intel Hyper-
Threading Technology, a correctable internal parity error or unpredictable system
behavior may occur.
Implication: A correctable error (IA32_MC0_STATUS.MCACOD=0005H and
IA32_MC0_STATUS.MSCOD=0001H) may be logged. The unpredictable system
behavior frequently leads to faults (e.g. #UD, #PF, #GP).
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the Steppings affected, see the Summary Tables of Changes.
BDF77 Inband PECI Concurrent With OS Patch Load May Result in Incorrect
Throttling Causing Reduced System Performance
Problem: Microcode updates loaded by the operating system may result in excessive and
persistent throttling that significantly reduces system performance.