Datasheet

Intel® Xeon® Processor E5-2400 v3 Product Family 51
Datasheet Volume One
Processor Land Listing
4 Processor Land Listing
4.1 Land Listing by Name
Note: This land listing is provided in this document for convenience.
Table 4-1. Land Listing (Sheet 1 of 37)
Land Name
Land
Number
Buffer Type Direction
BCLK0_DN AN13 CMOS I
BCLK0_DP AP13 CMOS I
BCLK1_DN AM30 CMOS I
BCLK1_DP AN30 CMOS I
BIST_ENABLE AM6 CMOS I
BMCINIT AF1 CMOS I
BPM_N[0] AL10 ODCMOS I/O
BPM_N[1] AK15 ODCMOS I/O
BPM_N[2] AR11 ODCMOS I/O
BPM_N[3] AN11 ODCMOS I/O
BPM_N[4] AP10 ODCMOS I/O
BPM_N[5] AP11 ODCMOS I/O
BPM_N[6] AN10 ODCMOS I/O
BPM_N[7] AP12 ODCMOS I/O
CATERR_N AT6 ODCMOS I/O
DBR_N AE36
DDR_RESET_C01_N L26 CMOS O
DDR_RESET_C23_N D27 CMOS O
DDR_SCL_C01 W7 ODCMOS I/O
DDR_SCL_C23 V40 ODCMOS I/O
DDR_SDA_C01 W6 ODCMOS I/O
DDR_SDA_C23 V37 ODCMOS I/O
DDR01_RCOMP[0] P10 ANALOG I
DDR01_RCOMP[1] N10 ANALOG I
DDR01_RCOMP[2] W10 ANALOG I
DDR01_VREF M7 DC O
DDR01_VREFDQ[1] W4 DC O
DDR1_BA[0] H16 SSTL O
DDR1_BA[1] J16 SSTL O
DDR1_BA[2] J22 SSTL O
DDR1_CAS_N L13 SSTL O
DDR1_CKE[0] J25 SSTL O
DDR1_CKE[1] J26 SSTL O
DDR1_CKE[2] K24 SSTL O
DDR1_CKE[3] H26 SSTL O
DDR1_CLK_DN[0] J17 SSTL O
DDR1_CLK_DN[1] G19 SSTL O
DDR1_CLK_DN[2] L16 SSTL O
DDR1_CLK_DN[3] H18 SSTL O
DDR1_CLK_DP[0] K17 SSTL O
DDR1_CLK_DP[1] H19 SSTL O
DDR1_CLK_DP[2] L17 SSTL O
DDR1_CLK_DP[3] J18 SSTL O
DDR1_CS_N[0] K15 SSTL O
DDR1_CS_N[1] L15 SSTL O
DDR1_CS_N[2] L11 SSTL O
DDR1_CS_N[3] K11 SSTL O
DDR1_CS_N[4] J15 SSTL O
DDR1_CS_N[5] L14 SSTL O
DDR1_CS_N[6] L12 SSTL O
DDR1_CS_N[7] K12 SSTL O
DDR1_DQ[0] AC34 SSTL I/O
DDR1_DQ[1] AC35 SSTL I/O
DDR1_DQ[10] M35 SSTL I/O
DDR1_DQ[11] M36 SSTL I/O
DDR1_DQ[12] U35 SSTL I/O
DDR1_DQ[13] U36 SSTL I/O
DDR1_DQ[14] N35 SSTL I/O
DDR1_DQ[15] N36 SSTL I/O
DDR1_DQ[16] J36 SSTL I/O
DDR1_DQ[17] J35 SSTL I/O
DDR1_DQ[18] E35 SSTL I/O
Table 4-1. Land Listing (Sheet 2 of 37)
Land Name
Land
Number
Buffer Type Direction