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Intel® Xeon® Processor E5-2400 v3 Product Family 49

Datasheet Volume One

Signal Descriptions

3.10 Processor Power and Ground Supplies

THERMTRIP_N Assertion of THERMTRIP_N (Thermal Trip) indicates one of two possible critical over-

temperature conditions: One, the processor junction temperature has reached a level

beyond which permanent silicon damage may occur and Two, the system memory

interface has exceeded a critical temperature limit set by BIOS. Measurement of the

processor junction temperature is accomplished through multiple internal thermal

sensors that are monitored by the Digital Thermal Sensor (DTS). Simultaneously, the

Power Control Unit (PCU) monitors external memory temperatures via the dedicated

SMBus interface to the DIMMs. If any of the DIMMs exceed the BIOS defined limits, the

PCU will signal THERMTRIP_N to prevent damage to the DIMMs. Once activated, the

processor will stop all execution and shut down all PLLs. To further protect the

processor, all power supply voltages must be removed following the assertion of

THERMTRIP_N. Once activated, THERMTRIP_N remains latched until RESET_N is

asserted. While the assertion of the RESET_N signal may de-assert THERMTRIP_N, if

the processor's junction temperature remains at or above the trip level, THERMTRIP_N

will again be asserted after RESET_N is de-asserted. This signal can also be asserted if

the system memory interface has exceeded a critical temperature limit set by BIOS.

This signal is sampled after PWRGOOD assertion.

TXT_AGENT Intel

Trusted Execution Technology (Intel

TXT) Agent Strap.

0 = Default. The socket is not the Intel

TXT Agent.

1 = The socket is the Intel

TXT Agent.

The legacy socket (identified by SOCKET_ID[1:0] = 00b) with Intel

TXT Agent should

always set the TXT_AGENT to 1b.

This signal is pulled down on the die, refer to Table 2-5 for details.

TXT_PLTEN Intel

Trusted Execution Technology (Intel

TXT) Platform Enable Strap.

0 = The platform is not Intel

TXT enabled. All sockets should be set to zero.

1 = Default. The platform is Intel

TXT enabled. All sockets should be set to one. When

this is set, Intel

TXT functionality requires user to explicitly enable Intel

TXT via

BIOS setup.

This signal is pulled up on the die, refer to Table 2-5 for details.

Table 3-13. Miscellaneous Signals

Signal Name Description

PROC_ID_N This output can be used by the platform to distinguish between Intel® Xeon® Processor

E5-2400 v3 Product Family or a potential future product family. There is no connection

either to the silicon or package substrate.

SKTOCC_N SKTOCC_N (Socket occupied) is used to indicate that a processor is present. This is

pulled to ground on the processor package; there is no connection to the processor

silicon for this signal.

DBR_N

These signals are pass-through pins with no connection to processor silicon for use with

Top Side Probe only. Signals pass from the system board through package substrate to

connector pins on the top side of the processor package. Top Side Probe implementation

is found in the Platform Design Guide.

ITP_BCLK_D[N/P]

JTAG_TDOX

SYS_PWROK

Table 3-14. Power and Ground Signals (Sheet 1 of 2)

Signal Name Description

CCIN

Power supply input for the Integrated Voltage Regulators the deliver power to processor

cores, lowest level caches, ring interface, and home agent. The output voltage of this

supply is selected by the processor, using the serial voltage identification (SVID)

interface.

Table 3-12. Processor Asynchronous Sideband Signals (Sheet 3 of 3)

Signal Name Description