Datasheet

Intel® Xeon® Processor E5-2400 v3 Product Family 45
Datasheet Volume One
Signal Descriptions
Note: Refer to the Platform Design Guide for additional implementation details.
3.3 DMI2/PCI Express* Port 0 Signals
3.4 Intel
®
QuickPath Interconnect Signals
PE3B_TX_DN[7:4]
PE3B_TX_DP[7:4]
PCIe Transmit Data Output
PE3C_TX_DN[11:8]
PE3C_TX_DP[11:8]
PCIe Transmit Data Output
PE3D_TX_DN[15:12]
PE3D_TX_DP[15:12]
PCIe Transmit Data Output
Table 3-5. PCI Express* Miscellaneous Signals
Signal Name Description
PE_HP_SCL PCI Express* Hot-Plug SMBus Clock: Provides PCI Express* hot-plug support
via a dedicated SMBus interface. Requires an external general purpose
input/output (GPIO) expansion device on the platform.
PE_HP_SDA PCI Express* Hot-Plug SMBus Data: Provides PCI Express* hot-plug support via
a dedicated SMBus interface. Requires an external general purpose
input/output (GPIO) expansion device on the platform.
Table 3-4. PCI Express* Port 3 Signals (Sheet 2 of 2)
Signal Name Description
Table 3-6. DMI2 and PCI Express Port 0 Signals
Signal Name Description
DMI_RX_DN[3:0]
DMI_RX_DP[3:0]
DMI2 Receive Data Input
DMI_TX_DP[3:0]
DMI_TX_DN[3:0]
DMI2 Transmit Data Output
Table 3-7. Intel
®
QPI Port Signals
Signal Name Description
QPI1_CLKRX_DN/DP Reference Clock Differential Input. These pins provide the PLL reference clock
differential input. The Intel
®
QPI forward clock frequency is half the Intel
®
QPI
data rate.
QPI1_CLKTX_DN/DP Reference Clock Differential Output. These pins provide the PLL reference clock
differential input. The Intel
®
QPI forward clock frequency is half the Intel
®
QPI
data rate.
QPI1_DRX_DN/DP[19:0] Intel
®
QPI Receive data input.
QPI1_DTX_DN/DP[19:0] Intel
®
QPI Transmit data output.