Datasheet

Intel® Xeon® Processor E5-2400 v3 Product Family 27
Datasheet Volume One
Electrical Specifications
2. Individual processor VID values may be calibrated during manufacturing such that two devices at the same speed may have
different settings.
3. Voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is required.
A future processor may be developed requiring a nominal voltage 0.95V.
4. The V
CCIN
voltage specification requirements are measured across the remote sense pin pairs (VCCIN_SENSE and
VSS_VCCIN_SENSE) on the processor package. Voltage measurement should be taken with a DC to 100 MHz bandwidth
oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF maximum probe capacitance, and 1 MΩ
minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external
noise from the system is not coupled in the scope probe.
5. For the processor refer to Table 2-12 and corresponding Figure 2-2. The processor should not be subjected to any static V
CCIN
level that exceeds the V
CCIN_MAX
associated with any particular current. Failure to adhere to this specification can shorten
processor lifetime.
6. Minimum V
CCIN
and maximum I
CCIN
are specified at the maximum processor case temperature (T
CASE
) shown in the
processor TMSDG. I
CCIN_MAX
is specified at the relative V
CCIN_MAX
point on the V
CCIN
Loadline. The processor is capable of
drawing I
CCIN_MAX
for up to 4 milliseconds.
7. This specification represents the V
CCIN
increase or decrease due to each VID transition
8. Baseboard bandwidth is limited to 20 MHz.
9. DC + AC + Ripple specification
10. V
CCIN
has a V
BOOT
setting of 1.7 V and is included in the PWRGOOD indication.
Notes:
1. Unless otherwise noted, all specifications in this table apply to all models in the processor family. Specifications are based on
preliminary silicon characterization.
2. TDC (Thermal Design Current) is the sustained (DC equivalent) current that the processor is capable of drawing indefinitely
and should be used for the voltage regulator thermal assessment. The voltage regulator is responsible for monitoring its
temperature and asserting the necessary signal to inform the processor of a thermal excursion.
3. I
CCD
specifications are current draw on V
CCD
of processor only and do not include current consumption by memory devices.
4. Minimum V
CCIN
and maximum I
CCIN
are specified at the maximum processor case temperature (T
CASE
) ICCIN_MAX is
specified at the corresponding voltage point on the V
CCIN
Loadline. The processor is capable of drawing ICCIN_MAX for up to
4 milliseconds.
5. P
MAX
is provided for V
CCIN
for ensuring adequate capability in design and sizing of the power delivery components.
2.9.2 V
CCIN
Power Delivery for Integrated Voltage Regulators
The V
CCIN
voltage rail supplies the input source to the integrated voltage regulators
powering cores, cache and system agents. This integration improves regulation of on-
die voltages optimizing performance and power savings. The V
CCIN
rail is supplied by
an external voltage regulator.
Adhering to power delivery specifications is mandatory for ensuring long-term reliable
operation of processors and system components. The Intel® Xeon® Processor E5-2400
v3 Product Family implements a 1.40-m
Ω loadline with a tolerance band ±25 mV.
Static and Transient Tolerances are repeated here for convenience in Table 2-12 and
Figure 2-2
Table 2-11. Processor Power Supply Current Specifications
Parameter and Definition Processor TDP / Core count
TDC
2
(A)
Max
(A)
P
MAX
5
(W)
Notes
1
I
CCIO_IN
I/O Termination Supply,
Processor Current on V
CCIO_IN,
V
CCPECI
All Intel® Xeon® Processor E5-2400
v3 Product Family
.02 0.1
I
CCD
3
Memory Controller DDR3 Supply,
Processor Current on V
CCD
57 3
I
CCIN
Integrated Voltage Regulator Supply
Processor Current on V
CCIN
LV70W-10C 43 90 138
LV65W-8C 1S 40 83 128
LV55W-8C 34 70 109
LV50W-6C 285788
LV45W-4C 255178