Datasheet

8Intel
®
Xeon
®
Processor E5-1600/E5-2600/E5-4600 v2 Product Families
Datasheet Volume One of Two
Tables
1-1 HCC, MCC, and LCC SKU Table Summary..............................................................11
1-2 Volume Structure and Scope ...............................................................................13
1-3 Referenced Documents.......................................................................................24
2-1 Summary of Processor-specific PECI Commands ....................................................30
2-2 Minor Revision Number Meaning ..........................................................................33
2-3 GetTemp() Response Definition ...........................................................................34
2-4 RdPkgConfig() Response Definition.......................................................................35
2-5 WrPkgConfig() Response Definition ......................................................................38
2-6 RdPkgConfig() & WrPkgConfig() DRAM Thermal and Power Optimization
Services Summary.............................................................................................39
2-7 Channel & DIMM Index Decoding .........................................................................41
2-8 RdPkgConfig() & WrPkgConfig() CPU Thermal and Power Optimization
Services Summary.............................................................................................46
2-9 Power Control Register Unit Calculations...............................................................51
2-10 RdIAMSR() Response Definition ...........................................................................62
2-11 RdIAMSR() Services Summary12.........................................................................63
2-12 RdPCIConfig() Response Definition.......................................................................65
2-13 RdPCIConfigLocal() Response Definition................................................................67
2-14 WrPCIConfigLocal() Response Definition................................................................68
2-15 WrPCIConfigLocal() Memory Controller and IIO Device/Function Support...................69
2-16 PECI Client Response During Power-Up.................................................................70
2-17 SOCKET ID Strapping.........................................................................................71
2-18 Power Impact of PECI Commands vs. C-states.......................................................71
2-19 Domain ID Definition..........................................................................................74
2-20 Multi-Domain Command Code Reference...............................................................74
2-21 Completion Code Pass/Fail Mask..........................................................................75
2-22 Device Specific Completion Code (CC) Definition....................................................75
2-23 Originator Response Guidelines............................................................................76
2-24 Error Codes and Descriptions...............................................................................77
4-1 System States...................................................................................................87
4-2 Package C-State Support....................................................................................87
4-3 Core C-State Support.........................................................................................88
4-4 System Memory Power States .............................................................................88
4-5 DMI2/PCI Express* Link States............................................................................89
4-6 Intel® QPI States..............................................................................................89
4-7 G, S and C State Combinations............................................................................89
4-8 P_LVLx to MWAIT Conversion..............................................................................92
4-9 Coordination of Core Power States at the Package Level..........................................94
4-10 Package C-State Power Specifications...................................................................97
4-11 Processor Package Power Pmax ...........................................................................97
5-1 TCase Temperature Thermal Specifications..........................................................105
5-2 Digital Thermal Sensor (DTS) Specification Summary ...........................................106
5-3 Embedded TCase Temperature Thermal Specifications..........................................109
5-4 Embedded DTS Thermal Specifications ...............................................................111
6-1 Memory Channel DDR0, DDR1, DDR2, DDR3 .......................................................119
6-2 Memory Channel Miscellaneous..........................................................................120
6-3 PCI Express* Port 1 Signals ..............................................................................120
6-4 PCI Express* Port 2 Signals ..............................................................................120
6-5 PCI Express* Port 3 Signals ..............................................................................121
6-6 PCI Express* Miscellaneous Signals....................................................................121