Datasheet

Overview
Intel
®
Xeon
®
Processor E5-1600/E5-2600/E5-4600 v2 Product Families 21
Datasheet Volume One of Two
• Fan speed control with DTS
• Two integrated SMBus masters for accessing thermal data from DIMMs
• New Memory Thermal Throttling features via MEM_HOT_C{01/23}_N signals
• Running Average Power Limit (RAPL), Processor and DRAM Thermal and Power
Optimization Capabilities
1.5 Package Summary
The processor socket type is 52.5 x 45 mm or 52.5 x 51 mm FCLGA12 package
(LGA2011-0).
1.6 Terminology
Term Description
ASPM Active State Power Management
BMC Baseboard Management Controllers
Cbo Cache and Core Box. It is a term used for internal logic providing ring interface to
LLC and Core.
DDR3 Third generation Double Data Rate SDRAM memory technology that is the
successor to DDR2 SDRAM
DMA Direct Memory Access
DMI Direct Media Interface
DMI2 Direct Media Interface Gen 2
DTS Digital Thermal Sensor
ECC Error Correction Code
Enhanced Intel
SpeedStep® Technology
Allows the operating system to reduce power consumption when performance is
not needed.
Execute Disable Bit The Execute Disable bit allows memory to be marked as executable or non-
executable, when combined with a supporting operating system. If code
attempts to run in non-executable memory the processor raises an error to the
operating system. This feature can prevent some classes of viruses or worms
that exploit buffer overrun vulnerabilities and can thus help improve the overall
security of the system. See the Intel® 64 and IA-32 Architectures Software
Developer's Manuals for more detailed information.
Flit Flow Control Unit. The Intel QPI Link layer’s unit of transfer; 1 Flit = 80-bits.
Functional Operation Refers to the normal operating conditions in which all processor specifications,
including DC, system bus, signal quality, mechanical, and thermal, are satisfied.
IMC
The Integrated Memory Controller. A Memory Controller that is integrated in the
processor die.
IIO The Integrated I/O Controller. An I/O controller that is integrated in the
processor die.
Intel
®
ME Intel
®
Management Engine (Intel
®
ME)
Intel
®
QuickData
Technology
Intel QuickData Technology is a platform solution designed to maximize the
throughput of server data traffic across a broader range of configurations and
server environments to achieve faster, scalable, and more reliable I/O.
Intel
®
QuickPath
Interconnect (Intel® QPI)
A cache-coherent, link-based Interconnect specification for Intel processors,
chipsets, and I/O bridge components.
Intel
®
64 Technology 64-bit memory extensions to the IA-32 architecture. Further details on Intel 64
architecture and programming model can be found at
http://developer.intel.com/technology/intel64/.