Datasheet

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Intel

Itanium

Processor 9300 Series and 9500 Series Datasheet 25

Electrical Specifications

Single-ended CMOS Inputs TCK, TDI, TMS, TRST_N

GTL Open Drain Output TDO

SMBus

Single-ended GTL I/O SMBCLK,

SMBDAT

SPD Bus

Single-ended GTL I/O SPDCLK

SPDDAT

Setup

Single-ended GTL Input BOOTMODE[1:0], SKTID[2:0]

System Management

Single-ended CMOS Input LRGSCLSYS

Flash ROM Port

Single-ended GTL-open Drain Input FLASHROM_CFG[2:0],

FLASHROM_DATI

GTL-open Drain Output FLASHROM_CS[3:0]_N, FLASHROM_CLK,

FLASHROM_DATO, FLASHROM_WP_N

ERROR Bus

Single-ended GTL Open Drain Output

GTL Input

ERROR[0]_N, ERROR[1]_N

MEM_THROTTLE_L

Power-up

Single-ended GTL Input PWRGOOD, RESET_N

Thermal

Single-ended GTL-Open Drain Output

GTL Input

PROCHOT_N, THERMTRIP_N, THERMALERT_N

FORCEPR_N

VID Port

(Intel

Itanium

Processor 9300 Series)

Single-ended CMOS Output VID_VCCCORE[6:0], VID_VCCCACHE[5:0],

VID_VCCUNCORE[6:0]

SVID Port

(Intel

Itanium

Processor 9500 Series)

Single-ended GTL Output SVID_CLK

GTL I/O SVD_DATIO

GTL Input SVID_ALERT_N

Voltage Regulator

Single-ended Open Collector/Drain Output VR_THERMTRIP_N, VRPWRGD (Intel

Itanium

Processor 9300 Series processor), VR_READY (Intel

Itanium

Processor 9500 Series processor), VR_FAN_N

Voltage Regulator Control

Single-ended CMOS Input

GTL Input

Open Collector/Drain Output

VROUTPUT_ENABLE0

VR_THERMALERT_N

VR_THERMTRIP_N, VRPWRGD, VR_FAN_N

Table 2-2. Signal Groups (Sheet 2 of 3)

Signal Group Buffer Type Signals 1, 2, 3