Datasheet

Intel
®
Itanium
®
Processor 9300 Series and 9500 Series Datasheet 11
Introduction
Intel
®
Itanium
®
Processor 9300 SeriesIntel
®
Itanium
®
Processor 9300 Series
Intel
®
Itanium
®
Processor Quad-Core 1.86-1.73 GHz with 24 MB L3 Cache 9350
Intel
®
Itanium
®
Processor Quad-Core 1.73-1.60 GHz with 20 MB L3 Cache 9340
Intel
®
Itanium
®
Processor Quad-Core 1.60-1.46 GHz with 20 MB L3 Cache 9330
Intel
®
Itanium
®
Processor Quad-Core 1.46-1.33 GHz with 16 MB L3 Cache 9320
Intel
®
Itanium
®
Processor Dual-Core 1.60 GHz Fixed Frequency with 10 MB L3 Cache 9310
Product Features
 Quad Core
— Four complete 64-bit processing cores on one
processor.
— Includes Dynamic Domain Partitioning.
 Advanced EPIC (Explicitly Parallel Instruction
Computing) Architecture for current and future
requirements of high-end enterprise and technical
workloads.
— Provide a variety of advanced implementations of
parallelism, predication, and speculation,
resulting in superior Instruction-Level Parallelism
(ILP).
 Intel
®
Hyper-Threading Technology
— Two times the number of OS threads per core.
 Wide, parallel hardware based on Intel
®
Itanium
®
architecture for high performance:
— Integrated on-die L3 cache of up to 24 MB; cache
hints for L1, L2, and L3 caches for reduced
memory latency.
— 128 general and 128 floating-point registers
supporting register rotation.
— Register stack engine for effective management
of processor resources.
— Support for predication and speculation.
 Extensive RAS features for business-critical
applications, for example:
— Machine check architecture with extensive ECC
and parity protection.
— On-chip thermal management.
— Built-in processor information ROM (PIROM).
— Built-in programmable EEPROM.
—Hot-Plug Socket
— Hot-add and hot removal.
— Double Device Data Correction (DDDC) for x4
DRAMs, plus correction of a single bit error.
— Single Device Data Correction (SDDC) for x8
DRAMs, plus correction of a single bit error.
—Intel
®
QuickPath Interconnect Dynamic Link
Width Reduction.
—Intel
®
QuickPath Interconnect Clock Fail-Safe
Feature.
— Intel QuickPath Interconnect (Intel
®
QPI) Hot-
Add and Removal.
— DIMM Sparing, Memory Scrubbing, Memory
Mirroring, and Memory Migration.
— Architected firmware stack, including PAL and
SAL support.
— Directory-based and source-based coherency
protocol.
— Intel QPI poisoning, viral containment and
cleanup.
 On-die Memory Controller
— Each memory controller supports two Intel
®
Scalable Memory Interconnects.
— Support for one Scalable Memory Buffer per Intel
Scalable Memory Interconnect; four Scalable
Memory Buffers per processor.
— High memory bandwidth, thus improved
performance.
— 4.8 GT/s for the Intel
®
7500 Scalable Memory
Buffer.
 Intel
®
Virtualization Technology for virtualization for
data-intensive applications.
— Reduce virtualization complexity.
— Improve virtualization performance.
— Increase operating system compatibility.
 Intel
®
Cache Safe Technology ensures mainframe-
caliber availability.
— Minimize L3 cache errors.
— Disable cache entries that have become hard
errors.
— Improve availability.
 High bandwidth Intel
®
QuickPath Interconnect for
multiprocessor scalability:
— 4 full and 2 half width Intel QPI Links
— 4.8GT/s transfer rate.
— Systems are easily scaled without sacrificing
performance.
 Features to support flexible platform environments:
— IA-32 Execution Layer supports IA-32 application
binaries.
— Bi-endian support.
— Processor abstraction layer eliminates processor
dependencies.