Datasheet

Electrical Specifications
64 Datasheet
2. These ratings apply to the Intel component and do not include the tray or packaging.
3. Failure to adhere to this specification can affect the long-term reliability of the processor.
4. Non-operating storage limits post board attach: Storage condition limits for the component once attached
to the application board are not specified. Intel does not conduct component level certification assessments
post board attach given the multitude of attach methods, socket types and board types used by customers.
Provided as general guidance only, Intel board products are specified and certified to meet the following
temperature and humidity limits (Non-Operating Temperature Limit: -40 °C to 70 °C and Humidity: 50% to
90%, non condensing with a maximum wet bulb of 28 °C).
5. Device storage temperature qualification methods follow JEDEC* High and Low Temperature Storage Life
Standards: JESD22-A119 (low temperature) and JESD22-A103 (high temperature).
7.5 DC Specifications
DC specifications are defined at the processor pads, unless otherwise noted.
DC specifications are only valid while meeting specifications for case temperature, clock
frequency, and input voltages. Care should be taken to read all notes associated with
each specification. For case temperature specifications, refer to the appropriate
processor Thermal Mechanical Specifications and Design Guide (see Related Documents
section).
7.5.1 Voltage and Current Specifications
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processors. These specifications are based on pre-silicon
characterization.
2. Individual processor VID values may be calibrated during manufacturing such that two devices at the same speed may have
different settings.
3. These voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is
required.
4. The V
CC
voltage specification requirements are measured across the remote sense pin pairs (VCC_SENSE and
VSS_VCC_SENSE) on the processor package. Voltage measurement should be taken with a DC to 100 MHz bandwidth
oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF maximum probe capacitance, and 1 MΩ
minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external
noise from the system is not coupled in the scope probe.
Table 7-10. Voltage Specifications
Symbol Parameter
Voltage
Plane
Min Typ Max Unit Notes
1
V
CC
VID
V
CC
VID Range
—0.6 — 1.35 V 2, 3
V
Retention
VID
Retention Voltage
VID in package C3
and C6 states
— — 0.65 — V 2, 3
V
CC
LL
V
CC
Loadline Slope
V
CC
0.8 mΩ
3, 4, 7, 8,
11, 13, 18
V
CC
TOB
V
CC
Tolerance Band
V
CC
15 mV
3, 4, 7, 8,
11, 13, 18
V
CC
Ripple
V
CC
Ripple
Vcc 5 mV
3, 4, 7, 8,
11, 13, 18
V
VID_STEP
(Vcc, Vsa,
Vccd)
VID step size during
a transition
—— 5.0 — mV10
V
CCPLL
PLL Voltage
V
CCPLL
0.955*V
CCPLL_TYP
1.7 1.045*V
CCPLL_TYP
V
11, 12, 13,
17
V
CCD
(
V
CCD_01,
V
CCD_23)
I/O Voltage for
DDR3 (Standard
Voltage)
V
CCD
0.95*V
CCD_TYP
1.5 1.05*V
CCD_TYP
V
11, 13, 14,
16, 17
V
TT (
V
TTA,
VTTD)
Uncore Voltage
V
TT
0.957*V
TT_TYP
1.00 1.043*V
TT_TYP
V
3, 5, 9, 12,
13
V
SA_VID
Vsa VID Range
V
SA
0.6 0.940 1.25 V 2, 3, 14, 15
V
SA
System Agent
Voltage
V
SA
V
SA_VID
- 0.057 V
SA_VID
V
SA_VID
+ 0.057 V
3, 6, 12,
14, 19