User manual

2-16 PXA250 and PXA210 Applications Processors Design Guide
System Memory Interface
Figure 2-7. Variable Latency I/O
Companion
Chip
PXA250
EXTERNAL SYSTEM
nCS(0,1,2,3,4,5)
nPWE
nOE
RDY
MD<31:0>
MA<25:0>
DQM<3:0>
PXA250
Memory
Controller