Specification Update

Errata

Specification Update 41

AM67 Debug Register May Contain Incorrect Information on a MOVSS or POPSS

Instruction Followed by SYSRET

Problem: In IA-32e mode, if a MOVSS or POPSS instruction with a debug breakpoint is followed

by the SYSRET instruction, incorrect information may exist in the Debug Status

Implication: When debugging or when developing debuggers, this behavior should be noted. This

erratum will not occur under normal usage of the MOVSS or POPSS instructions (i.e.,

following them with a MOV ESP instruction).

Workaround: Do not attempt to put a breakpoint on MOVSS and POPSS instructions that are

followed by a SYSRET.

Status: For the steppings affected, see the Summary Tables of Changes.

AM68 VM Bit is Cleared on Second Fault Handled by Task Switch from Virtual-8086

(VM86)

Problem: Following a task switch to any fault handler that was initiated while the processor was

in VM86 mode, if there is an additional fault while servicing the original task switch

then the VM bit will be incorrectly cleared in EFLAGS, data segments will not be

pushed and the processor will not return to the correct mode upon completion of the

second fault handler via IRET.

Implication: When the OS recovers from the second fault handler, the processor will no longer be

in VM86 mode. Normally, operating systems should prevent interrupt task switches

from faulting, thus the scenario should not occur under normal circumstances.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.

AM69 The BS Flag in DR6 May be Set for Non-Single-Step #DB Exception

Problem: DR6 BS (Single Step, bit 14) flag may be incorrectly set when the TF (Trap Flag, bit 8)

of the EFLAGS Register is set, and a #DB (Debug Exception) occurs due to one of the

following:

• DR7 GD (General Detect, bit 13) being bit set;

• INT1 instruction;

• Code breakpoint

Implication: The BS flag may be incorrectly set for non-single-step #DB exception.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.