Specification Update

Identification Information
Specification Update 15
Identification Information
Component Identification
The Celeron Processor 400 series can be identified by the following values:
Family
1
Model
2
00000110b 00010110b
NOTES:
1. The Family corresponds to bits [27:20] combined with bits [11:8] of the EDX register
after RESET, bits [27:20] combined with bits [11:8] of the EAX register after the CPUID
instruction is executed with a 1 in the EAX register, and the generation field of the Device
ID register accessible through Boundary Scan.
2. The Model corresponds to bits [19:16]<<4 combined with bits [7:4] of the EDX register
after RESET, bits [19:16]<<4 combined with bits [7:4] of the EAX register after the
CPUID instruction is executed with a 1 in the EAX register, and the model field of the
Device ID register accessible through Boundary Scan.
Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX
registers after the CPUID instruction is executed with a 2 in the EAX register.
Table 1. Intel
®
Celeron
®
Processor 400 Series Identification
S-Spec
Number
Core
Stepping
L2 Cache
Size
(bytes)
CPU ID Speed Core/Bus Package Notes
SL9XL A1 512K 10661h 2.0 GHz / 800 MHz 775-land LGA
1, 2, 3, 4 ,5, 6,
7, 8
SL9XN A1 512K 10661h 1.8 GHz / 800 MHz 775-land LGA
1, 2, 3, 4 ,5, 6,
7, 8
SL9XP A1 512K 10661h 1.6 GHz / 800 MHz 775-land LGA
1, 2, 4 ,5, 6, 7,
8, 9, 10
NOTES:
1. These processors support the 775_VR_CONFIG_06 specifications.
2. These processors support the 775_VR_CONFIG_05B specifications
3. These are Engineering samples only.
4. These parts support the Intel
®
64 architecture.
5. These parts support Execute Disable Bit Feature (NX).
6. These parts have PROCHOT# enabled
7. These parts have THERMTRIP# enabled
8. These parts have PECI enabled
9. These parts have Tdiode enabled
10. These parts have Enhanced HALT State enabled