Intel Celeron Processor for the PGA370 Socket up to 1.40 GHz on 0.13 Micron Process Datasheet

ManualsBrandsIntel ManualsOtherIntel Celeron Processor 850 MHz, 128K Cache, 100 MHz FSB

Datasheet 41

Intel

Celeron

Processor for PGA370 up to 1.40 GHz on 0.13 µ Process

3.0 Signal Quality Specifications

Signals driven on the processor system bus should meet signal quality specifications to ensure that

the components read data properly and to ensure that incoming signals do not affect the long term

reliability of the component. Specifications are provided for simulation at the processor pins.

Meeting the specifications at the processor pins in Table 23, Table 24, and Table 27 ensures that

signal quality effects will not adversely affect processor operation.

3.1 BCLK/BCLK# & PICCLK Signal Quality Specifications and

Measurement Guidelines

Table 24 describes the signal quality specifications at the processor pins for the processor system

bus clock (BCLK/BCLK#) and APIC clock (PICCLK) signals. References made to BCLK signal

quality specifications also applies to BCLK#. Figure 18 describes the signal quality waveform for

the system bus clock at the processor pins.

NOTES:

1. Unless otherwise noted, all specifications in this table apply to the processor up to 1.40 GHz frequency.

2. The rising and falling edge ringback voltage specified is the minimum (rising) or maximum (falling) absolute

voltage the BCLK/BCLK# and PICCLK signals can dip back to after passing the V

(rising) or V

(falling)

voltage limits. This specification is an absolute value.

Table 23. BCLK (Single-Ended Clock Mode) Signal Quality Specifications for Simulation at

the Processor Pins

T# Parameter Min Nom Max Unit Figure Notes

V1: BCLK VIL 0.3 V 18

V2: BCLK V

IH 2.2 V 18

V3: BCLK Absolute Voltage Range -0.5 3.1 V 18

V4: BCLK Rising Edge Ringback 2.0 V 18 2

V5: BCLK Falling Edge Ringback 0.5 V 18 2

Table 24. BCLK/BCLK# (Differential Clock Mode) and PICCLK Signal Quality Specifications

for Simulation at the Processor Pins

T# Parameter Min Nom Max Unit Figure Notes

V1: BCLK VIL -0.2 0.35 V 18

V1: PICCLK V

IL 0.40 V 18

V2: BCLK V

IH 0.92 1.45 V 18

V2 PICCLK V

IH 1.60 V 18

V3: BCLK Absolute Voltage Range -0.2 1.45 V 18

V3: PICCLK Absolute Voltage Range -0.4 2.4 V 18

V4: BCLK Rising Edge Ringback 0.35 V 18 2

V4: PICCLK Rising Edge Ringback 1.60 V 18 2

V5: BCLK Falling Edge Ringback -0.35 V 18 2

V5: PICCLK Falling Edge Ringback 0.40 V 18 2