Guide

Platform Design Checklist
R
262 Intel
®
852GM Chipset Platform Design Guide
14.8.8. USB Interface
Pin Name System
Pull-up/Pull-down
Notes
9
USB_OC[5:0]#
10 k
Ω pull-up to V3ALWAYS
if not driven
No pull-up is required if signalsl are driven.. Signals
must NOT float if they are not being used.
USBRBIAS,
USBRBIAS#
22.6
Ω ± 1% pull-down to gnd
Connect signals together and pull down through a
common resistor, placed within 500 mils of the ICH4-
M. Avoid routing next to clock pin.
14.8.9. Hub Interface
Pin Name System
Pull-up/Pull-down
Notes
9
HUB_RCOMP
48.7
Ω 1% pull-up to to Vcc1_5
Place resistor within 0.5” of ICH4-M pad using a thick
trace.
HUB_VREF,
HUB_VSWING
See Figure 145 and Figure
146.
HUB_VREF signal voltage level = 0.35 V ± 8%.
HUB_VSWING signal voltage level = 0.80 V ± 8%.
Three options are available for generating these
references.
HUB_PD11
56
Ω pull-down to gnd
Figure 145. Single or Locally Generated GMCH & ICH4-M HIVREF/HI_VSWING Circuit
ICH4-M
HIREF
R3
R2
C3
C4
VCCHI=1.5V
C1
C2
HI_VSWING
R1
GMCH
PVSWING
HLVREF
C5
C6
Option 1
R1 = 226
Ω ±
1%,
R2 = 147 Ω ± 1%,
R3 = 113 Ω ± 1%
Option 2
R1 = 80.6
Ω ±
1%,
R2 = 51.1
Ω ±
1%,
R3 = 40.2
Ω ±
1%
Option 3
R1 = 255 Ω ± 1%,
R2 = 162 Ω ± 1%,
R3 = 127
Ω ±
1%
C1 and C3 = 0.1 µF
(near divider)
C2, C4, C5, C6 =
0.01µF (near
component)
Intel
®
ICH4
HIREF
R3
R2
C4
VCCHI=1.5V
C2
HI_VSWING
R1
GMCH
HLVREF
R3
R2
C4
VCCHI=1.5V
C2
PVSWING
R1