Intel Celeron Processor for the PGA370 Socket up to 1.40 GHz on 0.13 Micron Process Datasheet

Datasheet 5
Intel
®
Celeron
®
Processor for PGA370 up to 1.40 GHz on 0.13 µ Process
List of Figures
1 Integrated Heat Spreader (IHS) ............................................................................9
2 AGTL Bus Topology in a Uniprocessor Configuration.........................................14
3 Stop Clock State Machine...................................................................................14
4 PLL Filter Specification........................................................................................18
5 Differential/Single-Ended Clocking Example.......................................................19
6V
TT Power Good and Bus Select Interconnect Diagram.....................................21
7 BSEL[1:0] Example for a System Design............................................................24
8 Vcc Static and Transient Tolerance ....................................................................28
9 Clock Waveform..................................................................................................36
10 BCLK/BCLK#, PICCLK, and TCK Generic Clock Waveform ..............................37
11 System Bus Valid Delay Timings ........................................................................37
12 System Bus Setup and Hold Timings..................................................................38
13 System Bus Reset and Configuration Timings....................................................38
14 Platform Power-On Sequence and Timings........................................................39
15 Power-On Reset and Configuration Timings.......................................................39
16 Test Timings (TAP Connection) ..........................................................................40
17 Test Reset Timings .............................................................................................40
18 BCLK/BCLK#, PICCLK Generic Clock Waveform at the Processor Pins ...........42
19 Low to High AGTL Receiver Ringback Tolerance...............................................43
20 Maximum Acceptable AGTL Overshoot/Undershoot Waveform .........................47
21 Non-AGTL Overshoot/Undershoot, Settling Limit, and Ringback ......................47
22 Noise Estimation .................................................................................................50
23 Package Dimensions...........................................................................................53
24 Volumetric Keep-Out...........................................................................................55
25 Component Keep-Out .........................................................................................55
26 Top Side Processor Markings .............................................................................56
27 Processor Pinout................................................................................................57
28 Conceptual Boxed Processor for the PGA370 Socket........................................68
29 Comparison between FC-PGA and FC-PGA2 package......................................69
30 Side View of Space Requirements for the Boxed Processor ..............................69
31 Dimensions of Mechanical Step Feature in Heatsink Base.................................70
32 Thermal Airspace Requirement for all Boxed Processor Fan
Heatsinks in the PGA370 Socket ........................................................................71
33 Boxed Processor Fan Heatsink Power Cable Connector Description.................72
34 Motherboard Power Header Placement Relative to the Boxed Processor..........72