Intel Celeron Processor for the PGA370 Socket up to 1.40 GHz on 0.13 Micron Process Datasheet

40 Datasheet
Intel
®
Celeron
®
Processor for PGA370 up to 1.40 GHz on 0.13 µ Process
Figure 16. Test Timings (TAP Connection)
Figure 17. Test Reset Timings
T
r
= T43 (All Non-Test Inputs Setup Time)
T
s
= T44 (All Non-Test Inputs Hold Time)
T
u
= T40 (TDO Float Delay)
T
v
= T37 (TDI, TMS Setup Time)
T
w
= T38 (TDI, TMS Hold TIme)
T
x
= T39 (TDO Valid Delay)
T
y
= T41 (All Non-Test Outputs Valid Delay)
T
z
= T42 (All Non-Test Outputs Float Time)
T
v
T
w
T
r
T
s
T
u
T
z
T
x
T
y
TCK
TDI, TMS
Input
Signal
TDO
Output
Signal
T36
TRST#
T36 = TRST# Pulse Width
1.00V