Intel Celeron Processor in the 478-Pin Package at 1.80 GHz Datasheet

Datasheet 97
Intel
®
Celeron
®
Processor in the 478-Pin Package
9.0 Debug Tools Specifications
Refer to the ITP700 Debug Port Design Guide and the appropriate Platform Design Guide for
information regarding debug tools specifications.
9.1 Logic Analyzer Interface (LAI)
Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use
in debugging Celeron
processor in the 478-pin package systems. Tektronix* and Agilent* should
be contacted to get specific information about their logic analyzer interfaces. The following
information is general. Specific information must be obtained from the logic analyzer vendor.
Due to the complexity of Celeron
processor in the 478-pin package systems, the LAI is critical in
providing the ability to probe and capture system bus signals. There are two sets of considerations
to keep in mind when designing a Celeron
processor in the 478-pin package system that can make
use of an LAI: mechanical and electrical.
9.1.1 Mechanical Considerations
The LAI is installed between the processor socket and the Celeron processor in the 478-pin
package. The LAI pins plug into the socket, while the Celeron
processor in the 478-pin package
pins plug into a socket on the LAI. Cabling that is part of the LAI egresses the system to allow an
electrical connection between the Celeron
processor in the 478-pin package and a logic analyzer.
The maximum volume occupied by the LAI, known as the keepout volume, as well as the cable
egress restrictions, should be obtained from the logic analyzer vendor. System designers must
make sure that the keepout volume remains unobstructed inside the system. Note that it is possible
that the keepout volume reserved for the LAI may differ from the space normally occupied by the
Celeron
processor in the 478-pin package heatsink. If this is the case, the logic analyzer vendor will
provide a cooling solution as part of the LAI.
9.1.2 Electrical Considerations
The LAI will also affect the electrical performance of the system bus; therefore, it is critical to
obtain electrical load models from each of the logic analyzers to be able to run system level
simulations to prove that their tool will work in the system. Contact the logic analyzer vendor for
electrical specifications and load models for the LAI solution they provide.