Intel Celeron Processor in the 478-Pin Package at 1.80 GHz Datasheet

16 Datasheet
Intel
®
Celeron
®
Processor in the 478-Pin Package
2.3.4 Phase Lock Loop (PLL) Power and Filter
VCCA and VCCIOPLL are power sources required by the PLL clock generators on the Celeron
processor in the 478-pin package . Since these PLLs are analog in nature, they require quiet power
supplies for minimum jitter. Jitter is detrimental to the system: it degrades external I/O timings as
well as internal core timings (i.e. maximum frequency). To prevent this degradation, these supplies
must be low pass filtered from V
CC. A typical filter topology is shown in Figure 1.
The AC low-pass requirements, with input at V
CC and output measured across the capacitor
(C
A
or C
IO
in Figure 1), is as follows:
• < 0.2 dB gain in pass band
• < 0.5 dB attenuation in pass band < 1 Hz (see DC drop in next set of requirements)
• > 34 dB attenuation from 1 MHz to 66 MHz
• > 28 dB attenuation from 66 MHz to core frequency
The filter requirements are illustrated in Figure 2. For recommendations on implementing the filter
refer to Table 1 for the appropriate Platform Design Guide.
Figure 1. Typical V
CCIOPLL, VCCA and VSSA Power Distribution
VCC
R
VCCA
VSSA
VCCIOPLL
R
L
L
Processor
Core
PLL
C
A
C
IO