Guide

Platform Design Checklist
R
Intel
®
852GM Chipset Platform Design Guide 269
14.11. LAN / HomePNA Checklist
14.11.1. Resistor Recommendations (for 82562ET / 82562EM)
Pin Name System
Pull-up/Pull-down
Term
Resistor
Notes
9
ISOL_EX,
ISOL_TCK,
ISOL_TI
10 k
Ω pull-up to
VccSus3_3LAN
If LAN is enabled, all three signals needs to
be pulled up to VccSus3_3LAN through a
common 10 K
Ω pull-up resistor.
See Figure 149.
RBIAS10
549
Ω ± 1%pull-down to gnd
RBIAS100
619
Ω ± 1%pull-down to gnd
RDP, RDN
121
Ω ±1%
Connect 121-ohm resistor between RDP and
RDN.
TDP, TDN
100
Ω ± 1%
Connect 100-ohm resistor between TDP and
TDN.
TESTEN
100
Ω pull-down to gnd
X1, X2 Connect a 25-MHz crystal across these two
pins. 22pF on each pin to ground.
LAN_RST# On CRB, the power monitoring logic waits for
PM_PWROK to go high before deasserting
this signal to enable the LAN device. It also
keeps this signal high during S3.
See Figure 149.
Figure 149. LAN_RST# Design Recommendation
ISOL_TCK
ISOL_TI
ISOL_EX
VccSus3_3LAN
LAN_RST#
10k
82562EM
14.11.2. Decoupling Recommendations
Signal Name Configuration F Qty Notes
9
VCC[2:1],
VCCP[2:1],
VCCA[2:1],
VCCT[4:1]
Connect to
VccSus3_3LAN
0.1 µF
4.7 µF
4
2
VCCR[2:1] Connect to
VccSus3_3LAN via
filter
0.1 µF
4.7 µF
1
1
4.7 uH from power supply to VCCR pins.
Caps on VCCR side of the inductor.