Document
Datasheet 3
Contents
1Introduction..............................................................................................................7
1.1 Terminology .......................................................................................................8
1.2 References .........................................................................................................9
2 Low Power Features ................................................................................................11
2.1 Clock Control and Low Power States ....................................................................11
2.1.1 Core Low-Power States ...........................................................................12
2.1.1.1 C0 State..................................................................................12
2.1.1.2 C1/AutoHALT Powerdown State ..................................................12
2.1.1.3 C1/MWAIT Powerdown State ......................................................13
2.1.1.4 Core C2 State...........................................................................13
2.1.1.5 Core C3 State...........................................................................13
2.1.2 Package Low-Power States ......................................................................13
2.1.2.1 Normal State............................................................................ 13
2.1.2.2 Stop-Grant State ...................................................................... 13
2.1.2.3 Stop Grant Snoop State............................................................. 14
2.1.2.4 Sleep State.............................................................................. 14
2.1.2.5 Deep Sleep State......................................................................15
2.2 Low-Power FSB Features....................................................................................15
2.3 Processor Power Status Indicator (PSI#) Signal.....................................................15
3 Electrical Specifications...........................................................................................17
3.1 Power and Ground Pins ......................................................................................17
3.2 FSB Clock (BCLK[1:0]) and Processor Clocking......................................................17
3.3 Voltage Identification.........................................................................................17
3.4 Catastrophic Thermal Protection..........................................................................21
3.5 Reserved and Unused Pins..................................................................................21
3.6 FSB Frequency Select Signals (BSEL[2:0])............................................................22
3.7 FSB Signal Groups.............................................................................................22
3.8 CMOS Signals ................................................................................................... 23
3.9 Maximum Ratings..............................................................................................23
3.10 Processor DC Specifications ................................................................................ 24
4 Package Mechanical Specifications and Pin Information ..........................................29
4.1 Package Mechanical Specifications....................................................................... 29
4.2 Processor Pinout and Pin List .............................................................................. 34
4.3 Alphabetical Signals Reference........................................................................... 53
5 Thermal Specifications ............................................................................................61
5.1 Thermal Diode.................................................................................................. 62
5.1.1 Thermal Diode Offset..............................................................................62
5.2 IntelĀ® Thermal Monitor......................................................................................64
5.3 Digital Thermal Sensor.......................................................................................66
5.4 Out of Specification Detection .............................................................................66
5.5 PROCHOT# Signal Pin........................................................................................ 67