Specification Update

Errata

AT20. Sequential Code Fetch to Non-canonical Address May have

Nondeterministic Results

Problem:

If code sequentially executes off the end of the positive canonical address space

(falling through from address 00007fffffffffff to non- canonical address

0000800000000000), under some circumstances the code fetch will be converted to a

canonical fetch at address ffff800000000000.

Implication: Due to this erratum, the processor may transfer control to an unintended address. The

result of fetching code at that address is unpredictable and may include an

unexpected trap or fault, or execution of the instructions found there.

Workaround: If the last page of the positive canonical address space is not allocated for code (4K

page at 00007ffffffff000 or 2M page at 00007fffffe00000) then the problem cannot

occur.

Status: For the steppings affected, see the Summary Tables of Changes.

AT21. Some Bus Performance Monitoring Events May Not Count Local

Events under Certain Conditions

Problem: Many Performance Monitoring Events require core-specificity, which specifies

which core’s events are to be counted (local core, other core or both cores).

Due to this erratum, some Bus Performance Monitoring events may not count

when the core-specificity is set to the local core.

The following Bus Performance Monitoring events will not count power

management related events for local core-specificity:

• BUS_TRANS_ IO (Event: 6CH) – Will not count I/O level reads resulting from

package-resolved C-state

• BUS_TRANS_ANY (Event: 70H) – Will not count Stop-Grants

Implication: The count values for the affected events may be lower than expected. The

degree of undercount depends on the occurrence of erratum conditions while

the affected events are active.

Workaround: None identified.

Status:

For the steppings affected, see the Summary Tables of Changes.