Specification Update

Errata
Specification Update 39
AM61 PEBS Buffer Overflow Status Will Not be Indicated Unless
IA32_DEBUGCTL[12] is Set
Problem: IA32_PERF_GLOBAL_STATUS MSR (38EH) bit [62] when set, indicates that a PEBS
(Precise Event-Based Sampling) overflow has occurred and a PMI (Performance
Monitor Interrupt) has been sent. Due to this erratum, this bit will not be set unless
IA32_DEBUGCTL MSR (1D9H) bit [12] (which stops all Performance Monitor Counters
upon a PMI) is also set.
Implication: Due to this erratum, IA32_PERF_GLOBAL_STATUS[62] will not signal indicate that a
PMI was generated due to a PEBS Overflow unless IA32_DEBUGCTL[12] is set.
Workaround: It is possible for the software to set IA32_DEBUGCTL[12] to avoid this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
AM62 Asynchronous MCE During a Far Transfer May Corrupt ESP
Problem: If an asynchronous machine check occurs during an interrupt, call through gate, FAR
RET or IRET and in the presence of certain internal conditions, ESP may be corrupted.
Implication: : If the MCE (Machine Check Exception) handler is called without a stack switch, then
a triple fault will occur due to the corrupted stack pointer, resulting in a processor
shutdown. If the MCE is called with a stack switch, e.g. when the CPL
(Current Privilege Level) was changed or when going through an interrupt task
gate, then the corrupted ESP will be saved on the new stack or in the TSS (Task State
Segment), and will not be used.
Workaround: Use an interrupt task gate for the machine check handler.
Status: For the steppings affected, see the Summary Tables of Changes.
AM63 B0-B3 Bits in DR6 May Not be Properly Cleared After Code Breakpoint
Problem: B0-B3 bits (breakpoint conditions detect flags, bits [3:0]) in DR6 may not be properly
cleared when the following sequence happens:
• POP instruction to SS (Stack Segment) selector;
• Next instruction is FP (Floating Point) that gets FP assist followed by code
breakpoint.
Implication: B0-B3 bits in DR6 may not be properly cleared.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.