Data Sheet

Thermal Management
98 Datasheet, Volume 1 of 2
DDR4 temperature may be acquired through an on-board thermal sensor (TS-on-
Board), retrieved by an embedded controller and reported to the processor through the
PECI 3.1 interface. This methodology is known as PECI injected temperature. This is a
method of Closed Loop Thermal Management (CLTM).
The following notes apply only to Table 5-2, Table 5-4 and Table 5-5.
Note Definition
1
The TDP and Configurable TDP values are the average power dissipation in junction temperature
operating condition limit, for the SKU Segment and Configuration, for which the processor is validated
during manufacturing when executing an associated Intel-specified high-complexity workload at the
processor IA core frequency corresponding to the configuration and SKU.
2
TDP workload may consist of a combination of processor IA core intensive and graphics core intensive
applications.
3 Can be modified at runtime by MSR writes, with MMIO and with PECI commands.
4
'Turbo Time Parameter' is a mathematical parameter (units of seconds) that controls the processor
turbo algorithm using a moving average of energy usage. Do not set the Turbo Time Parameter to a
value less than 0.1 seconds. refer to Section 5.1.3.2 for further information.
5
Shown limit is a time averaged power, based upon the Turbo Time Parameter. Absolute product power
may exceed the set limits for short durations or under virus or uncharacterized workloads.
6
Processor will be controlled to specified power limit as described in Section 5.1.2. If the power value
and/or 'Turbo Time Parameter' is changed during runtime, it may take a short period of time
(approximately 3 to 5 times the 'Turbo Time Parameter') for the algorithm to settle at the new control
limits.
7
This is a hardware default setting and not a behavioral characteristic of the part. The reference BIOS
code may override the hardware default power limit values to optimize performance
8 For controllable turbo workloads, the PL2 limit may be exceeded for up to 10 ms.
9 Refer to Table 5-1 for the definitions of 'base', 'TDP-Up' and 'TDP-Down'.
10
LPM power level is an opportunistic power and is not a guaranteed value as usages and
implementations may vary.
11
Power limits may vary depending on if the product supports the 'TDP-up' and/or 'TDP-down' modes.
Default power limits can be found in the PKG_PWR_SKU MSR (614h).
12
The processor die and OPCM die do not reach maximum sustained power simultaneously since the
sum of the 2 dies estimated power budget is controlled to be equal to or less than the package TDP
(PL1) limit.
13
cTDP down power is based on GT2 equivalent graphics configuration. cTDP down does not decrease
the number of active Processor Graphics EUs, but relies on Power Budget Management (PL1) to
achieve the specified power level.
14
May vary based on SKU, Not all SKUs have cTDP up/down, each SKU has a different base Frequency
and cTDP frequency respective.
15 Sustained residencies at high voltages and temperatures may temporarily limit turbo frequency.
16
The formula of PL2=PL1*1.25 is the hardware default but may not represent the optimum value for
processor performance.
By including the benefits available from power and thermal management features the recommended
value for PL2 found in the PDG/Power Map can be higher.