Data Sheet

Datasheet, Volume 1 of 2 79
Power Management
4.3 Integrated Memory Controller (IMC) Power
Management
The main memory is power managed during normal operation and in low-power ACPI
C-states.
4.3.1 Disabling Unused System Memory Outputs
Any system memory (SM) interface signal that goes to a memory in which it is not
connected to any actual memory devices (such as SODIMM connector is unpopulated,
or is single-sided) is tri-stated. The benefits of disabling unused SM signals are:
• Reduced power consumption.
• Reduced possible overshoot/undershoot signal quality issues Refer by the processor
I/O buffer receivers caused by reflections from potentially un-terminated
transmission lines.
When a given rank is not populated, the corresponding control signals (CLK_P/CLK_N/
CKE/ODT/CS) are not driven.
At reset, all rows should be assumed to be populated, until it can be proven that they
are not populated. This is due to the fact that when CKE is tri-stated with a DRAMs
present, the DRAMs are not ensured to maintain data integrity. CKE tri-state should be
enabled by BIOS where appropriate, since at reset all rows should be assumed to be
populated.
4.3.2 DRAM Power Management and Initialization
The processor implements extensive support for power management on the memory
interface. Each channel drives 4 CKE pins, one per rank.
The CKE is one of the power-saving means. When CKE is off, the internal DDR clock is
disabled and the DDR power is reduced. The power-saving differs according to the
selected mode and the DDR type used. For more information, refer to the IDD table in
the DDR specification.
The processor supports four different types of power-down modes in package C0 state.
The different power-down modes can be enabled through configuring PM PDWN
configuration register. The type of CKE power-down can be configured through
PDWN_mode (bits 15:12) and the idle timer can be configured through
PDWN_idle_counter (bits 11:0). The different power-down modes supported are:
• No power-down (CKE disable)
• Active power-down (APD): This mode is entered if there are open pages when
de-asserting CKE. In this mode the open pages are retained. Power-saving in this
mode is the lowest. Power consumption of DDR is defined by IDD3P. Exiting this
mode is fined by tXP – small number of cycles. For this mode, DRAM DLL should be
on.
• PPD/DLL-off: In this mode the data-in DLLs on DDR are off. Power-saving in this
mode is the best among all power modes. Power consumption is defined by IDD2P.
Exiting this mode is defined by tXP, but also tXPDLL (10–20 according to DDR type)
cycles until first data transfer is allowed. For this mode, DRAM DLL should be off.
• Precharged power-down (PPD): This mode is entered if all banks in DDR are
precharged when de-asserting CKE. Power-saving in this mode is intermediate –