Data Sheet

Power Management
76 Datasheet, Volume 1 of 2
Package C0
This is the normal operating state for the processor. The processor remains in the
normal state when at least one of its processor IA cores is in the C0 or C1 state or when
the platform has not granted permission to the processor to go into a low-power state.
Individual processor IA cores may be in deeper power idle states while the package is
in C0 state.
Package C2 State
Package C2 state is an internal processor state that cannot be explicitly requested by
software. A processor enters Package C2 state when either:
All processor IA cores have requested a C3 or deeper power state and all graphics
processor IA cores requested are in RC6, but constraints (LTR, programmed timer
events in the near future, and so forth) prevent entry to any state deeper than C2
state.
Or, all processor IA cores have requested a C3 or deeper power state and all
graphics processor IA cores requested are in RC6 and a memory access request is
received. Upon completion of all outstanding memory requests, the processor
transitions back into a deeper package C-state.
Package C3 State
A processor enters the package C3 low-power state when:
At least one processor IA core is in the C3 state.
The other processor IA cores are in a C3 or deeper power state, and the processor
has been granted permission by the platform.
The platform has not granted a request to a package C6/C7 state or deeper state
but has allowed a package C3 state.
In package C3-state, the LLC shared cache is valid.
Figure 4-4. Package C-State Entry and Exit