Data Sheet

4 Datasheet, Volume 1 of 2
2.5.5 High-Definition Multimedia Interface (HDMI*)............................................ 46
2.5.6 Digital Video Interface (DVI) ................................................................... 47
2.5.7 embedded DisplayPort* (eDP*) ............................................................... 47
2.5.8 Integrated Audio.................................................................................... 47
2.5.9 Multiple Display Configurations (Dual Channel DDR) ................................... 48
2.5.10 Multiple Display Configurations (Single Channel DDR) ................................. 49
2.5.11 High-bandwidth Digital Content Protection (HDCP) ..................................... 49
2.5.12 Display Link Data Rate Support................................................................ 50
2.5.13 Display Bit Per Pixel (BPP) Support........................................................... 51
2.5.14 Display Resolution per Link Width ............................................................ 51
2.6 Platform Environmental Control Interface (PECI) ................................................... 51
2.6.1 PECI Bus Architecture............................................................................. 51
3 Technologies........................................................................................................... 54
3.1 Intel
®
Virtualization Technology (Intel
®
VT) ......................................................... 54
3.1.1 Intel
®
Virtualization Technology (Intel
®
VT) for IA-32, Intel
®
64 and Intel
®
Architecture (Intel
®
VT-X)....................................................................... 54
3.1.2 Intel
®
Virtualization Technology (Intel
®
VT) for Directed I/O (Intel
®
VT-d).... 56
3.2 Security Technologies........................................................................................ 59
3.2.1 Intel
®
Trusted Execution Technology (Intel
®
TXT) ...................................... 59
3.2.2 Intel
®
Advanced Encryption Standard New Instructions (Intel
®
AES-NI) ........ 60
3.2.3 PCLMULQDQ (Perform Carry-Less Multiplication Quad Word) Instruction........ 60
3.2.4 Intel
®
Secure Key .................................................................................. 60
3.2.5 Execute Disable Bit ................................................................................ 61
3.2.6 Boot Guard Technology........................................................................... 61
3.2.7 Intel
®
Supervisor Mode Execution Protection (SMEP) .................................. 61
3.2.8 Intel
®
Supervisor Mode Access Protection (SMAP) ...................................... 61
3.2.9 Intel
®
Memory Protection Extensions (Intel
®
MPX)..................................... 62
3.2.10 Intel
®
Software Guard Extensions (Intel
®
SGX) ......................................... 62
3.2.11 Intel
®
Virtualization Technology (Intel
®
VT) for Directed I/O (Intel
®
VT-d).... 63
3.3 Power and Performance Technologies .................................................................. 63
3.3.1 Intel
®
Hyper-Threading Technology (Intel
®
HT Technology) ........................ 63
3.3.2 Intel
®
Turbo Boost Technology 2.0........................................................... 63
3.3.3 Intel
®
Thermal Velocity Boost (TVB)......................................................... 64
3.3.4 Intel
®
Advanced Vector Extensions 2 (Intel
®
AVX2).................................... 64
3.3.5 Intel
®
64 Architecture x2APIC ................................................................. 65
3.3.6 Power Aware Interrupt Routing (PAIR)...................................................... 66
3.3.7 Intel
®
Transactional Synchronization Extensions (Intel
®
TSX-NI) ................. 66
3.4 Debug Technologies .......................................................................................... 66
3.4.1 Intel
®
Processor Trace ........................................................................... 66
4 Power Management ................................................................................................ 67
4.1 Advanced Configuration and Power Interface (ACPI) States Supported ..................... 69
4.2 Processor IA Core Power Management ................................................................. 71
4.2.1 OS/HW Controlled P-states...................................................................... 71
4.2.2 Low-Power Idle States............................................................................ 72
4.2.3 Requesting Low-Power Idle States ........................................................... 73
4.2.4 Processor IA Core C-State Rules .............................................................. 73
4.2.5 Package C-States................................................................................... 75
4.2.6 Package C-States and Display Resolutions................................................. 78
4.3 Integrated Memory Controller (IMC) Power Management........................................ 79
4.3.1 Disabling Unused System Memory Outputs................................................ 79
4.3.2 DRAM Power Management and Initialization .............................................. 79
4.3.3 DDR Electrical Power Gating (EPG) ........................................................... 81
4.3.4 Power Training ...................................................................................... 82
4.4 PCI Express* Power Management ....................................................................... 82