Data Sheet
Datasheet, Volume 1 of 2 39
Interfaces
2.4.5 Gen 9 LP (9th Generation Low Power) Block Diagram
2.4.6 GT2/3 Graphic Frequency
Figure 2-6. Gen 9 LP Block Diagram
Table 2-17. GT2/3 Graphics Frequency (S/H/U-Processor Line)
Segment GT Unslice
GT Unslice +
1 GT Slice
GT Unslice +
2 GT Slice
S-Processor Line - 6-Core with
GT2
GT Max Dynamic frequency
[GT Unslice only] -
(1or2)BIN
—
H-Processor Line - 6-Core with
GT2
GT Max Dynamic frequency
[GT Unslice only] -
(1or2)BIN
—
U-Processor Line- 4-Core with
GT3 and OPC
GT Max Dynamic frequency
[GT Unslice only] -
(1or2)BIN
[GT Unslice + 1
Slice] - (1or2)BIN