Data Sheet
Datasheet, Volume 1 of 2 21
Interfaces
Table 2-3. Supported DDR4 Non-ECC SODIMM Module Configurations (H/U-Processor
Lines)
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Ranks
# of
Row/Col
Address
Bits
# of
Banks
Inside
DRAM
Page
Size
A 4 GB 4 Gb 512M x 8 8 1 15/10 16 8K
A 8 GB 8 Gb 1024M x 8 8 1 16/10 16 8K
B 8 GB 4 Gb 512M x 8 16 2 15/10 16 8K
B 16 GB 8 Gb 1024M x 8 16 2 16/10 16 8K
C 2 GB 4 Gb 256M x 16 4 1 15/10 8 8K
C 4 GB 8 Gb 512M x 16 4 1 16/10 8 8K
E 8 GB 4 Gb 512M x 8 16 2 15/10 16 8K
E 16 GB 8 Gb 1024M x 8 16 2 16/10 16 8K
E 32 GB 16 Gb
1
2048M x 8 16 2 17/10 16 8K
Table 2-4. Supported DDR4 ECC SODIMM Module Configurations (S/H-Processor Lines)
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Ranks
# of
Row/Col
Address
Bits
# of
Banks
Inside
DRAM
Page
Size
D 4 GB 4 Gb 512M x 8 9 1 15/10 16 8K
D 8 GB 8 Gb 1024M x 8 9 1 16/10 16 8K
G 8 GB 4 Gb 512M x 8 18 2 15/10 16 8K
G 16 GB 8 Gb 1024M x 8 18 2 16/10 16 8K
H 8 GB 4 Gb 512M x 8 18 2 15/10 16 8K
H 16 GB 8 Gb 1024M x 8 18 2 16/10 16 8K
Note: Not all H/S -Processors support ECC. ECC support depends on Processor skew, refer DCI for support
capabilities.
Table 2-5. Supported DDR4 Memory Down Device Configurations(H/U-Processor Lines)
Max
System
Capacity
1R (HU)
Max System
Capacity
2R (H)
PKG Type
(Die bits x
PKG Bits)
DRAM
Organization /
PKG Type
PKG
Density
Die
Density
PKGs Per
Channel
(1R,2R)
Banks
Inside
DRAM
Page
Size
8 GB 16 GB SDP 8x8 512M x 8 4 Gb 4 Gb 8,16 16 8K
16 GB 32 GB SDP 8x8 1024M x 8 8 Gb 8 Gb 8,16 16 8K
4 GB N/A SDP 16x16 256M x 16 4 Gb 4 Gb 4 8 8K
8 GB N/A SDP 16x16 512M x 16 8 Gb 8 Gb 4 8 8K
16 GB N/A DDP 8x16 1024M x 16 16 Gb 8 Gb 4 16 8K
32 GB 64GB SDP 8x8 2048M x 8 16 Gb 16 Gb
1
8,16 16 8K