Data Sheet
Datasheet, Volume 1 of 2 13
Introduction
• Intel
®
64 Architecture
• Execute Disable Bit
• Intel
®
Turbo Boost Technology 2.0
• Intel
®
Advanced Vector Extensions 2 (Intel
®
AVX2)
• Intel
®
Advanced Encryption Standard New Instructions (Intel
®
AES-NI)
• PCLMULQDQ (Perform Carry-Less Multiplication Quad word) Instruction
• Intel
®
Secure Key
• Intel
®
Transactional Synchronization Extensions (Intel
®
TSX-NI)
• PAIR – Power Aware Interrupt Routing
• SMEP – Supervisor Mode Execution Protection
• Intel
®
Boot Guard
• On-package Cache Memory
• Intel
®
Software Guard Extensions (Intel
®
SGX)
• Intel
®
Memory Protection Extensions (Intel
®
MPX)
• GMM Scoring Accelerator
• Intel
®
Processor Trace
• High Definition Content Protection (HDCP) 2.2
Note: The availability of the features may vary between processor SKUs.
Refer to Chapter 3 for more information.
1.3 Power Management Support
1.3.1 Processor Core Power Management
• Full support of ACPI C-states as implemented by the following processor C-states:
— C0, C1, C1E, C3, C6, C7, C8, C9, C10
• Enhanced Intel
®
SpeedStep
®
Technology
Notes:
• Package C-State C10 is supported when S-Processor Line is paired with an Intel
300 Series Chipset Family Platform Controller Hub.
• Package C-State C10 is not supported when S-Processor Line is paired with an Intel
200 Series Chipset Family Platform Controller Hub (e.g., Intel Z370 chipset).
Refer to Section 4.2 for more information.
1.3.2 System Power Management
• S0/S0ix, S3, S4, S5
Refer to Chapter 4, “Power Management” for more information.