Data Sheet
Datasheet, Volume 1 of 2 119
Electrical Specifications
7.2.1.2 Vcc
GT
DC Specifications
DC_LL
(S-
Processors
)
Loadline slope within
the VR regulation
loop capability
S-Processor Line -
8-Core GT2/GT0,
(95W)
— — 1.6 m 10, 13, 14
S-Processor Line -
6-Core GT2/GT0
— — 2.1 m 10, 13, 14
S-Processor Line - 4-Core
GT2/GT0
— — 2.1 m 10, 13, 14
S-Processor Line -
2-Core GT2/GT1
— — 2.1 m 10, 13, 14
AC_LL
(UHS-
Processors
)
AC Loadline UHS-Processor Lines — —
Same as Max DC_LL (up to
400 KHz)
m 10, 13, 14
T_OVS_TD
P_MAX
Max Overshoot time
TDP/virus mode
— — — 10/30 s
—
V_OVS
TDP_MAX/
virus_MAX
Max Overshoot at
TDP/virus mode
— — — 70/200 mV
Notes:
1. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical data. These
specifications will be updated with characterized data from silicon measurements at a later date.
2. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and
cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same
frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor
during a power management event (Adaptive Thermal Monitor, Enhanced Intel
®
SpeedStep Technology, or low-power
states).
3. The voltage specification requirements are measured across Vcc_SENSE and Vss_SENSE as near as possible to the processor
with an oscilloscope set to 100-MHz bandwidth, 1.5 pF maximum probe capacitance, and 1 M minimum impedance. The
maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not
coupled into the oscilloscope probe.
4. Processor IA core VR to be designed to electrically support this current.
5. Processor IA core VR to be designed to thermally support this current indefinitely.
6. Long term reliability cannot be assured if tolerance, ripple, and core noise parameters are violated.
7. Long term reliability cannot be assured in conditions above or below Max/Min functional limits.
8. PSx refers to the voltage regulator power state as set by the SVID protocol.
9. N/A
10. LL measured at sense points.
11. Typ column represents Icc
MAX
for commercial application it is NOT a specification - it is a characterization of limited samples
using limited set of benchmarks that can be exceeded.
12. Operating voltage range in steady state.
13. LL specification values should not be exceeded. If exceeded, power, performance and reliability penalty are expected.
14. Load Line (AC/DC) should be measured by the VRTT tool and programmed accordingly via the BIOS Load Line override setup
options. AC/DC Load Line BIOS programming directly affects operating voltages (AC) and power measurements (DC). A
superior board design with a shallower AC Load Line can improve on power, performance, and thermals compared to boards
designed for POR impedance.
15. An IMVP8 controller to support S82 65W and 95W VCCORE need to have offset voltage (33h) capability and potentially
VCCORE output voltage (VID +Offset) may be set higher than 1.52V.
16. S line is having a compatibility option, this opportunity allowed mounting each one of S processor on any S platform, In order
to implement it correctly BIOS should be config to the right platform capability.
Table 7-3. Processor Graphics (Vcc
GT
) Supply DC Voltage and Current Specifications
(Sheet 1 of 3)
Symbol Parameter Segment Min Typ Max
Unit Note
1
Operating
voltage
Active voltage
Range for
Vcc
GT
All 0 — 1.52 V
2, 3,
6, 8
Table 7-2. Processor IA core (Vcc) Active and Idle Mode DC Voltage and Current
Specifications (Sheet 3 of 3)
Symbol Parameter Segment Min Typ Max Unit Note
1