User Manual

Specification Update 17
HSH31 Full Duplex NTB Traffic Can Cause a System Hang
Problem: If two PCIe* endpoints target traffic to PB23BASE (Bus 0; Device 3; Function 0; Offset
0x18, 0x1c) and PB45BASE (Bus 0; Device 3; Function 0; Offset 0x20, 0x24) registers
at the same time, a deadlock can result.
Implication: Due to this erratum, the system may hang.
Workaround: A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH32 CONFIG_TDP_NOMINAL CSR Implemented at Incorrect Offset
Problem: The PCIe* Base Specification indicates that Configuration Space Headers have a base
address register at offset 0x10. Due to this erratum, the Power Control Unit’s
CONFIG_TDP_NOMINAL CSR (Bus 1; Device 30; Function 3; Offset 0x10) is located
where a base address register is expected.
Implication: Software may treat the CONFIG_TDP_NOMINAL CSR as a base address register leading
to a failure to boot.
Workaround: None identified.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH33 Software Using Intel® Transactional Synchronization Extensions
(Intel® TSX) May Result in Unpredictable System Behavior
Problem: Under a complex set of internal timing conditions and system events, software using
the Intel TSX instructions may result in unpredictable system behavior.
Implication: This erratum may result in unpredictable system behavior.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH34 A Machine-Check Exception Due to Instruction Fetch May Be Delivered
Before an Instruction Breakpoint
Problem: from fetching an instruction. Due to this erratum, a machine-check exception resulting
from the fetch of an instruction may take priority over an instruction breakpoint if the
instruction crosses a 32-byte boundary and the second part of the instruction is in a
32-byte poisoned instruction fetch block.
Implication: Instruction breakpoints may not operate as expected in the presence of a poisoned
instruction fetch block.
Workaround: None identified.
Status: For the affected steppings, see the Summary Tables of Changes.